Surface-Potential-Based Drain Current Model for Polycrystalline Silicon Thin-Film Transistors

2008 ◽  
Vol 47 (10) ◽  
pp. 7798-7802 ◽  
Author(s):  
Hiroshi Tsuji ◽  
Tsuyoshi Kuzuoka ◽  
Yuji Kishida ◽  
Yoshiyuki Shimizu ◽  
Masaharu Kirihara ◽  
...  
2013 ◽  
Vol 114 (18) ◽  
pp. 184502 ◽  
Author(s):  
A. Tsormpatzoglou ◽  
N. A. Hastas ◽  
N. Choi ◽  
F. Mahmoudabadi ◽  
M. K. Hatalis ◽  
...  

2001 ◽  
Vol 664 ◽  
Author(s):  
Ming Wu ◽  
Sigurd Wagner

ABSTRACTWe fabricated self-aligned polycrystalline silicon (polysilicon) thin film transistors on flexible steel substrates. The polysilicon was formed by furnace crystallization of hydrogenated amorphous silicon at 950°C/20sec or 750°C/2min. The TFTs made from these polysilicon films have hole field effect mobilities in the linear regime of 22 cm2·V−1s−1 (950°C) and 14 cm2·V−1s−1 (750°C). The OFF current at 10 V drain-source voltage is 10−10A and the drain current ON/OFF ratio is ∼106.


1999 ◽  
Vol 86 (12) ◽  
pp. 7083-7086 ◽  
Author(s):  
C. T. Angelis ◽  
C. A. Dimitriadis ◽  
F. V. Farmakis ◽  
J. Brini ◽  
G. Kamarinos ◽  
...  

Sign in / Sign up

Export Citation Format

Share Document