Physical design methodology for analog circuitsin a system-on-a-chip environment

Author(s):  
Eric G. Soenen
2014 ◽  
Vol 2014 ◽  
pp. 1-8 ◽  
Author(s):  
Naser Mohammadzadeh ◽  
Tayebeh Bahreini ◽  
Hossein Badri

Physical design and synthesis are two key processes of quantum circuit design methodology. The physical design process itself decomposes into scheduling, mapping, routing, and placement. In this paper, a mathematical model is proposed for mapping, routing, and scheduling in ion-trap technology in order to minimize latency of the circuit. The proposed model which is a mixed integer linear programming (MILP) model gives the optimal locations for gates and the best sequence of operations in terms of latency. Experimental results show that our scheme outperforms the other schemes for the attempted benchmarks.


Author(s):  
Tomoaki Sato ◽  
Sorawat Chivapreecha ◽  
Phichet Moungnoul ◽  
Kohji Higuchi

Field-programmable gate arrays (FPGAs) are used in various systems with reconfigurable functions. Conventional FPGAs have been developed using a transistor level description for minimizing routing delay. Although FPGAs developed with a register transfer level (RTL) design methodology provide various benefits to the designers of a system-on-a-chip (SoC), they have not been realized. Therefore, the authors advanced their development. They should be shown to operate with practical throughput. For this purpose, circuits on these device need to be designed and evaluated. In this paper, a ripple-carry adder (RCA) was designed and the throughput of the RCA was evaluated. The resulting throughput was applicable to network processors. Additionally, a wave-pipelined operation without changing the RCA revealed that the problem of routing delay in FPGA developed by RTL methodology was mitigated. The contributions of this paper are to clarify that a 4-bit adder can be implemented on FPGAs and their throughput can be improved by wave-pipelined operations.


1992 ◽  
Vol 114 (3) ◽  
pp. 257-270 ◽  
Author(s):  
Avram Bar-Cohen

The incessant improvements in IC technology have made it possible to conceptualize “information appliances” providing nearly unimaginable scalar, vector, and massively parallel information processing capability in small and relatively cheap computing platforms. The successful commercialization of such systems requires substantially shortened “time-to-market”, as well as dramatically reduced cost-of-ownership, and places extraordinary demands on packaging and physical design. A science-based physical design methodology, which can guide the development, selection, and evaluation of advanced packaging technology, will be needed to generate these sophisticated products. Mechanical engineers must play a major role in replacing the conventional “trial and error” development process with a science-based design methodology.


2010 ◽  
Vol 25 (2) ◽  
pp. 225-231
Author(s):  
Ji-Ye Zhao ◽  
Dong Liu ◽  
Dan-Dan Huan ◽  
Meng-Hao Su ◽  
Bin Xiao ◽  
...  

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