Neighbor-cell assisted error correction for MLC NAND flash memories

The 2014 ACM international conference on Measurement and modeling of computer systems - SIGMETRICS '14 ◽

10.1145/2591971.2591994 ◽

2014 ◽

Author(s):

Yu Cai ◽

Gulay Yalcin ◽

Onur Mutlu ◽

Erich F. Haratsch ◽

Osman Unsal ◽

...

Keyword(s):

Error Correction ◽

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Nonlinear Multi-Error Correction Codes for Reliable MLC nand Flash Memories

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2011.2157183 ◽

2012 ◽

Vol 20 (7) ◽

pp. 1221-1234 ◽

Author(s):

Zhen Wang ◽

Mark Karpovsky ◽

Ajay Joshi

Keyword(s):

Error Correction ◽

Error Correction Codes ◽

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BCH and LDPC Error Correction Codes for NAND Flash Memories

3D Flash Memories ◽

10.1007/978-94-017-7512-0_10 ◽

2016 ◽

pp. 281-320

Author(s):

Alessia Marelli ◽

Rino Micheloni

Keyword(s):

Error Correction ◽

Error Correction Codes ◽

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CCI Error Correction to Correct Bit-line Applied Voltage for MLC NAND Flash Memories

The Journal of Korean Institute of Information Technology ◽

10.14801/kitr.2014.12.11.23 ◽

2014 ◽

Vol 12 (11) ◽

Author(s):

Kui-Yon Lee

Keyword(s):

Error Correction ◽

Applied Voltage ◽

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An Error Correction Method for Neighborhood-Level Errors in NAND Flash Memories

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ◽

10.1587/transfun.e100.a.653 ◽

2017 ◽

Vol E100.A (2) ◽

pp. 653-662

Author(s):

Shohei KOTAKI ◽

Masato KITAKAMI

Keyword(s):

Error Correction ◽

Correction Method ◽

Flash Memories ◽

Error Correction Method ◽

Neighborhood Level

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Product Code Schemes for Error Correction in MLC NAND Flash Memories

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/tvlsi.2011.2174389 ◽

2012 ◽

Vol 20 (12) ◽

pp. 2302-2314 ◽

Author(s):

Chengen Yang ◽

Yunus Emre ◽

Chaitali Chakrabarti

Keyword(s):

Error Correction ◽

Flash Memories ◽

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Low-Power High-Throughput BCH Error Correction VLSI Design for Multi-Level Cell NAND Flash Memories

2006 IEEE Workshop on Signal Processing Systems Design and Implementation ◽

10.1109/sips.2006.352599 ◽

2006 ◽

Author(s):

Wei Liu ◽

Junrye Rho ◽

Wonyong Sung

Keyword(s):

Low Power ◽

Error Correction ◽

High Throughput ◽

Vlsi Design ◽

Flash Memories ◽

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Design of on-chip error correction systems for multilevel NOR and NAND flash memories

IET Circuits Devices & Systems ◽

10.1049/iet-cds:20060275 ◽

2007 ◽

Vol 1 (3) ◽

pp. 241 ◽

Author(s):

F. Sun ◽

S. Devarajan ◽

K. Rose ◽

T. Zhang

Keyword(s):

Error Correction ◽

Flash Memories ◽

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Error correction capability aware BCH implementation for NAND flash memories in Earth observation satellites

10.1117/12.2184644 ◽

2015 ◽

Author(s):

M. Fatih Aydogdu ◽

Yakup Murat Mert

Keyword(s):

Error Correction ◽

Earth Observation ◽

Flash Memories ◽

Error Correction Capability ◽

Earth Observation Satellites

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A high-speed layered min-sum LDPC decoder for error correction of NAND Flash memories

2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS) ◽

10.1109/mwscas.2011.6026357 ◽

2011 ◽

Author(s):

Jonghong Kim ◽

Junhee Cho ◽

Wonyong Sung

Keyword(s):

Error Correction ◽

Flash Memories ◽

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Improved NAND Flash Memories Storage Reliablity Using Nonlinear Multi Error Correction Codes

International Journal of Engineering Trends and Technology ◽

10.14445/22315381/ijett-v24p210 ◽

2015 ◽

Vol 24 (1) ◽

pp. 50-55

Author(s):

R.Naresh Naik ◽

◽

P.Siva Nagendra Reddy ◽

E. Ramakrishna Naik

Keyword(s):

Error Correction ◽

Error Correction Codes ◽

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