scholarly journals Production Engineering of Semiconductor Devices : Packaging and Assembly Engineering : Manufacturing Technologies in Semiconductor Device

1986 ◽  
Vol 89 (809) ◽  
pp. 403-409
Author(s):  
Manabu BONKOHARA
Keyword(s):  
Semiconductor Device ◽  
Semiconductor Devices ◽  
Production Engineering ◽  
Manufacturing Technologies

A Methodology for Addressing Defects in Transfer Moulding as an Encapsulating Technique for Semi-Conductors

2014 ◽  
Author(s):  
Philip Farrugia ◽  
Pierre Vella ◽  
Godwin Cutajar Kinsella
Keyword(s):  
Semiconductor Device ◽  
Semiconductor Devices ◽  
Die Design ◽  
Design Decision ◽  
Integrated Product Development ◽  
Execution Phase ◽  
Preparation Phase ◽  
Production Preparation ◽  
Transfer Moulding ◽  
Complex Semiconductor

One of the manufacturing steps involved in fabricating semiconductor devices is encapsulation, whose function is to protect the semiconductor device by sealing the package from environmental hazards such as heat, humidity and vibration. Transfer moulding, as an encapsulation technique, offers various advantages over other techniques such as injection moulding. In most cases it is difficult to foresee the effect of a design decision on a complex semiconductor process such as transfer moulding, since process robustness is rarely a function of a single property and is affected by several different parameters. A literature review reveals that whilst support has been developed to help relevant stakeholders to detect and rectify problems associated with fabrication of semiconductors, such as die design, photolithography and ion implantation, support aimed at guiding process engineers and other relevant stakeholders to rapidly deal with transfer moulding defects, are lacking. Within this context, the research reported in this paper is aimed at developing a methodology relevant to transfer moulding which guides stakeholders in identifying and rectifying mouldability problems concerning new semiconductor devices. The proposed methodology is aimed at capitalizing efforts on the production preparation phase of the Integrated Product Development model before problematic semiconductor products reach the execution phase. The methodology is the key contribution of this paper. The evaluation results collectively provide a degree of evidence that the developed methodology helps relevant stakeholders in this direction.

Evaluation of Power SiC-MOSFET Using Super-Higher-Order Scanning Nonlinear Dielectric Microscopy—Imaging of Carrier Distribution and Depletion Layer

2014 ◽  
Author(s):  
N. Chinone ◽  
Y. Cho ◽  
T. Nakamura
Keyword(s):  
Semiconductor Device ◽  
Low Cost ◽  
Semiconductor Devices ◽  
Higher Order ◽  
Depletion Layer ◽  
Dopant Distribution ◽  
Carrier Distribution ◽  
Microscopy Imaging ◽  
Nonlinear Dielectric ◽  
Power Semiconductor

Abstract Evaluation techniques for semiconductor devices are keys for device development with low cost and short time to market. Especially, dopant and depletion layer distribution in devices is a critical electrical property that needs to be evaluated. Super-higher-order nonlinear dielectric microscopy (SHOSNDM) is one of the promising techniques for semiconductor device evaluation. We developed a method for imaging detailed dopant distribution and depletion layers in semiconductor devices using SHO-SNDM. As a demonstration, a cross-section of a SiC power semiconductor device was measured by this method and detailed dopant distribution and depletion layer distributions were imaged.

CF4-Free Microwave Induced Plasma Decapsulation of Automotive Semiconductor Devices

2016 ◽  
Author(s):  
Jiaqi Tang ◽  
Jing Wang ◽  
Gregory B. Anderson ◽  
Johannes Bruckmeier ◽  
Claudia Keller ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Semiconductor Device ◽  
Copper Wire ◽  
Semiconductor Devices ◽  
Etching Rate ◽  
Automatic Process ◽  
Microwave Induced Plasma ◽  
Bond Wires ◽  
Etching Selectivity ◽  
Bond Pads

Abstract Failure analysis of automotive semiconductor devices requires highly reliable techniques to guaranty the success of artifact-free decapsulation with high repeatability and reproducibility. With the introduction of new qualification standards, new mold compounds, and new packaging structures, advanced decapsulation tools are needed to enable failure analysis to achieve a high success rate. Microwave Induced Plasma (MIP) machine has been developed as an advanced decapsulation solution. The CF4-free MIP etching ensures artifact-free exposure of bond wires made of new materials, the die, passivation, bond pads, and original failure sites. The high mold compound etching rate, high etching selectivity of mold compound to wire/pad/passivation/die, and the fully automatic process are the unique features of MIP decapsulation. Comparisons are made between acid, conventional plasma with CF4, and CF4-free MIP decapsulation. Multiple case studies are discussed that address challenging automotive semiconductor device decapsulation, including bare copper wire, copper redistribution layer, exposed power copper metal, stitch bond on silver plated leadframe, complex mold compound, Bond-Over-Active-Circuit, eWLB, and localized decapsulation.

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