CF4-Free Microwave Induced Plasma Decapsulation of Automotive Semiconductor Devices

Author(s):  
Jiaqi Tang ◽  
Jing Wang ◽  
Gregory B. Anderson ◽  
Johannes Bruckmeier ◽  
Claudia Keller ◽  
...  

Abstract Failure analysis of automotive semiconductor devices requires highly reliable techniques to guaranty the success of artifact-free decapsulation with high repeatability and reproducibility. With the introduction of new qualification standards, new mold compounds, and new packaging structures, advanced decapsulation tools are needed to enable failure analysis to achieve a high success rate. Microwave Induced Plasma (MIP) machine has been developed as an advanced decapsulation solution. The CF4-free MIP etching ensures artifact-free exposure of bond wires made of new materials, the die, passivation, bond pads, and original failure sites. The high mold compound etching rate, high etching selectivity of mold compound to wire/pad/passivation/die, and the fully automatic process are the unique features of MIP decapsulation. Comparisons are made between acid, conventional plasma with CF4, and CF4-free MIP decapsulation. Multiple case studies are discussed that address challenging automotive semiconductor device decapsulation, including bare copper wire, copper redistribution layer, exposed power copper metal, stitch bond on silver plated leadframe, complex mold compound, Bond-Over-Active-Circuit, eWLB, and localized decapsulation.

Author(s):  
Kai Wang ◽  
Rhys Weaver ◽  
David Johnson

Abstract A systemic analysis was chosen to evaluate a real case Bluetooth (BT) radio failure in the aspects of RF communication, digital design, firmware, application software, semiconductor device physics and processing, and failure analysis. This paper explores the range of testing, including customer application testing, required to confirm and localize a BT RF communication failure. It shows that the radio communication failure was not, as expected, caused by faulty radio hardware; it was rather linked to problematic encryption hardware at the assistance of the Synergy BT to mobile application. The paper also explores that the digital fault can only be detected by the timing sensitive transition fault scan patterns and how to obtain the physical failure location. Thus, the combination of ATPG and application testing provides a consistency between electrical diagnostics which yields a higher success rate at subsequent physical failure analysis of complex modern RF System on a Chip.


Author(s):  
Tomokazu Nakai

Abstract Currently many methods are available to obtain a junction profile of semiconductor devices, but the conventional methods have drawbacks, and they could be obstacles for junction profile analysis. This paper introduces an anodic wet etching-based two-dimensional junction profiling method, which is practical, efficient, and reliable for failure analysis and electrical characteristics evaluation.


Author(s):  
Huixian Wu ◽  
Arthur Chiang ◽  
David Le ◽  
Win Pratchayakun

Abstract With gold prices steadily going up in recent years, copper wire has gained popularity as a means to reduce cost of manufacturing microelectronic components. Performance tradeoff aside, there is an urgent need to thoroughly study the new technology to allay any fear of reliability compromise. Evaluation and optimization of copper wire bonding process is critical. In this paper, novel failure analysis and analytical techniques are applied to the evaluation of copper wire bonding process. Several FA/analytical techniques and FA procedures will be discussed in detail, including novel laser/chemical/plasma decapsulation, FIB, wet chemical etching, reactive ion etching (RIE), cross-section, CSAM, SEM, EDS, and a combination of these techniques. Two case studies will be given to demonstrate the use of these techniques in copper wire bonded devices.


Author(s):  
Bob Wettermann

Abstract As the pitch and package sizes of semiconductor devices have shrunk and their complexity has increased, the manual methods by which the packages can be re-bumped or reballed for failure analysis have not kept up with this miniaturization. There are some changes in the types of reballing preforms used in these manual methods along with solder excavation techniques required for packages with pitches as fine as 0.3mm. This paper will describe the shortcomings of the previous methods, explain the newer methods and materials and demonstrate their robustness through yield, mechanical solder joint strength and x-ray analysis.


Author(s):  
François Kerisit ◽  
Bernadette Domenges ◽  
Michael Obein

Abstract The introduction of silver as bonding material led to new failure analysis issues. This study compares the efficiency of wet and dry chemistries for decapsulation on Cu and Ag-based alloy wires. It is shown that dry chemistry allows better control and selectivity on the EMC/ Cu and Ag-based bond wires.


Author(s):  
Charles Zhang ◽  
Matt Thayer ◽  
Lowell Herlinger ◽  
Greg Dabney ◽  
Manuel Gonzalez

Abstract A number of backside analysis techniques rely on the successful use of optical beams in performing backside fault isolation. In this paper, the authors have investigated the influence of the 1340 nm and 1064 nm laser wavelength on advanced CMOS transistor performance.


1998 ◽  
Vol 523 ◽  
Author(s):  
Hong Zhang

AbstractApplication of transmission electron microscopy on sub-half micron devices has been illustrated in terms of process evaluation and failure analysis. For process evaluation, it is emphasized that a large number of features need to be examined in order to have reliable conclusions about the processes, while for failure analysis, the goal is to pin-point a single process step causing failure or a single source introducing the particle defect.


1988 ◽  
Vol 27 (4) ◽  
pp. 299-301
Author(s):  
J. Hirota ◽  
Y. Shibutani ◽  
T. Sugimura ◽  
K. Machida ◽  
T. Okuda

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