Increasing Fault Coverage in Benchmark Circuit using Design for Testability and Test Pattern Generation using 6NCA

International Journal of VLSI & Signal Processing ◽

10.14445/23942584/ijvsp-v5i3p101 ◽

2018 ◽

Vol 5 (3) ◽

pp. 1-10

Author(s):

Shashank Srivastava ◽

Tanusree Kaibartta

Keyword(s):

Test Pattern ◽

Design For Testability ◽

Fault Coverage ◽

Pattern Generation ◽

Test Pattern Generation ◽

Benchmark Circuit

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Test the S27 Benchmark Circuit by Using Built In Self Test and Test Pattern Generation

International Journal of Advanced Research in Electrical Electronics and Instrumentation Engineering ◽

10.15662/ijareeie.2014.0308083 ◽

2014 ◽

Vol 03 (08) ◽

pp. 11487-11495

Author(s):

S. Nagaraju ◽

Ch.N.L. Sujatha ◽

J.S.S. Ramaraju

Keyword(s):

Test Pattern ◽

Pattern Generation ◽

Test Pattern Generation ◽

Benchmark Circuit ◽

Self Test ◽

Built In Self Test

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An enhancement of lssd to reduce test pattern generation effort and increase fault coverage

19th Design Automation Conference ◽

10.1145/800263.809249 ◽

1982 ◽

Author(s):

Kewal K. Saluja

Keyword(s):

Test Pattern ◽

Fault Coverage ◽

Pattern Generation ◽

Test Pattern Generation

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Test Pattern Generation and Design- for- Testability

VLSI Custom Microelectronics ◽

10.1201/9780203909713.ch6 ◽

1998 ◽

Keyword(s):

Test Pattern ◽

Design For Testability ◽

Pattern Generation ◽

Test Pattern Generation

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A design for testability technique for test pattern generation with LFSRs

Proceedings of IEEE VLSI Test Symposium ◽

10.1109/vtest.1994.292332 ◽

2002 ◽

Author(s):

D. Kagaris ◽

S. Tragoudas

Keyword(s):

Test Pattern ◽

Design For Testability ◽

Pattern Generation ◽

Test Pattern Generation

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An Enhancement of LSSD to Reduce Test Pattern Generation Effort and Increase Fault Coverage

19th Design Automation Conference ◽

10.1109/dac.1982.1585543 ◽

1982 ◽

Author(s):

K.K. Saluja

Keyword(s):

Test Pattern ◽

Fault Coverage ◽

Pattern Generation ◽

Test Pattern Generation

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Automatic test pattern generation for improving the fault coverage of microprocessors

Proceedings Eighth Asian Test Symposium (ATS'99) ◽

10.1109/ats.1999.810723 ◽

2003 ◽

Author(s):

J. Hirase ◽

S. Yoshimura ◽

T. Sezaki

Keyword(s):

Test Pattern ◽

Fault Coverage ◽

Pattern Generation ◽

Test Pattern Generation ◽

Automatic Test Pattern Generation ◽

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An Integrated Design for Testability and Automatic Test Pattern Generation System: An Overview

21st Design Automation Conference Proceedings ◽

10.1109/dac.1984.1585796 ◽

1984 ◽

Author(s):

E. Trischler

Keyword(s):

Test Pattern ◽

Integrated Design ◽

Design For Testability ◽

Pattern Generation ◽

Test Pattern Generation ◽

Automatic Test Pattern Generation ◽

Generation System ◽

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Test pattern generation for logic crosstalk faults in VLSI circuits

IEE Proceedings G Circuits Devices and Systems ◽

10.1049/ip-g-2.1991.0034 ◽

1991 ◽

Vol 138 (2) ◽

pp. 179 ◽

Author(s):

A. Rubio ◽

J.A. Sainz ◽

K. Kinoshita

Keyword(s):

Test Pattern ◽

Pattern Generation ◽

Vlsi Circuits ◽

Test Pattern Generation

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Machine Intelligence for Efficient Test Pattern Generation

2020 IEEE International Test Conference (ITC) ◽

10.1109/itc44778.2020.9325250 ◽

2020 ◽

Author(s):

Soham Roy ◽

Spencer K. Millican ◽

Vishwani D. Agrawal

Keyword(s):

Test Pattern ◽

Pattern Generation ◽

Machine Intelligence ◽

Test Pattern Generation ◽

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An automatic test pattern generation framework for combinational threshold logic networks

IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings. ◽

10.1109/iccd.2004.1347974 ◽

2004 ◽

Author(s):

P. Gupta ◽

Rui Zhang ◽

N.K. Jha

Keyword(s):

Test Pattern ◽

Pattern Generation ◽

Test Pattern Generation ◽

Automatic Test Pattern Generation ◽

Threshold Logic ◽

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