System-Level Mitigation of Undersampling ADC Nonlinearity for High-IF Radio Receivers

Frequenz ◽  
2012 ◽  
Vol 66 (9-10) ◽  
Author(s):  
Georg Vallant ◽  
Michael Epp ◽  
Markus Allén ◽  
Mikko Valkama ◽  
Friedrich K. Jondral

AbstractOver the last years ongoing advances in ADC technology have enabled RF signals to be sampled at IF frequencies. Undersampling is nowadays employed in software-defined radio or radar receivers and offers the possibility to relieve requirements in the analog receiver partition. Unfortunately, when moving to higher IF concepts, this becomes demanding for the ADC itself, because of inherent spurious-free dynamic range (SFDR) roll-off that increases with input frequency. This fact often limits the receiver's IF placement to Nyquist zone (NZ) 2. In this work the emerging concept of Digital Assistance is pursued to give the receiver access to higher NZs while making no compromise on the SFDR. We will present and discuss post-correction results for two 16-bit high-speed converters from two different vendors at 120 and 125 MSPS, respectively. The proposed system-level post-correction decomposes nonlinearity into a static and a dynamic part. For both ADCs under investigation the degraded SFDR in higher NZs could be improved by up to 15 dB using purely digital linearization technologies, thus increasing the detectability of small signals in the presence of very strong signals or interferers. Near-identical results for both ADCs confirm the general validity of the system-level correction approach.

2021 ◽  
Vol 0 (0) ◽  
Author(s):  
Sarika Singh ◽  
Sandeep K. Arya ◽  
Shelly Singla ◽  
Pulkit Berwal

Abstract A linearization scheme is proposed for microwave photonic link to enlarge spurious free dynamic range using a dual-electrode dual parallel Mach–Zehnder modulator (MZM). This scheme employs phase control method to improve performance of the link by adjusting phase of radio frequency (RF) signals and bias voltages of optical modulator. Optical single sideband modulation is achieved through sub-modulators of dual parallel MZM which increases efficiency of the link. The simulated results show that third order intermodulation distortion is suppressed by 28 dB when the input RF signals are 9.1 and 9.5 GHz and noise floor is at −161 dBm/Hz. The spurious free dynamic range is also improved by 12.6 dB.


2015 ◽  
Vol 24 (03) ◽  
pp. 1550032 ◽  
Author(s):  
Siwan Dong ◽  
Minjie Liu ◽  
Zhangming Zhu ◽  
Yintang Yang

This paper presents a new bootstrapped switch with high speed and low nonlinear distortion. Instead of fixed voltage, the gate-to-source voltage of switch varies with input to implement first-order body effect compensation. Post-layout simulations have been done in standard 0.18-μm CMOS process at 1.8 V, and results indicate that at 200 MHz sample rate, a peak signal-to-noise-and-distortion ratio (SNDR) of 98.4 dB, spurious-free dynamic range (SFDR) of 105.7 dB and total harmonic distortion (THD) of -104.9 dB can be acquired. For input frequency up to the 60 MHz frequency, proposed structure maintains |THD| over 85 dB, SFDR better than 86 dB, respectively.


2018 ◽  
Vol 423 ◽  
pp. 17-20 ◽  
Author(s):  
Xiang Zhu ◽  
Tao Jin ◽  
Hao Chi ◽  
Guochuan Tong ◽  
Tianhao Lai ◽  
...  

2004 ◽  
Vol 13 (06) ◽  
pp. 1183-1201
Author(s):  
KAMAL EL-SANKARY ◽  
ALI ASSI ◽  
MOHAMAD SAWAN

Modern wireless communication standards that support high rates of voice and video streaming need high-speed Analog-to-Digital Converters (ADCs) with wide Spurious-Free Dynamic Range (SFDR). Conventional time-interleaved ADCs suffer from spurious components that seriously affect the SFDR. In this paper, we present the mathematical background describing the effect of randomizing the samples among the interleaved ADCs and we propose a digitally oriented method based on this analysis to randomize the mismatches among the ADC channels. Analyses and simulations show the effectiveness of the proposed approach in multi-channel ADCs with arbitrary bit resolution, channel's number and sampling rate. For a 10-bit 500 MS/s ADC, the SFDR achieved using the proposed randomizing method can be as wide as 75 dB, which is an enhancement of more than 26 dB comparing to the conventional time interleaved ADC.


2014 ◽  
Vol 03 (01) ◽  
pp. 1450001 ◽  
Author(s):  
N. A. PATEL ◽  
R. W. WILSON ◽  
R. PRIMIANI ◽  
J. WEINTROUB ◽  
J. TEST ◽  
...  

We report on tests of a 5 Gs/s analog-to-digital converter (ADC) used in the new Submillimeter Array (SMA) Digital Backend (DBE). The ADC is e2v EV8AQ160, with 8-bit resolution and 4 interleaved cores, operated in single-channel mode. We measured the frequency response, Signal to Noise and Distortion (SINAD), Spurious Free Dynamic Range (SFDR), Noise Power Ratio and intermodulation distortion over the bandwidth of 2.25 GHz. The performance of this ADC is found to be adequate for our application in the SMA DBE. We describe the procedure of aligning the four cores for adjustments of offset, gain and phase parameters which improve the performance of the ADC, particularly in SINAD and SFDR.


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