scholarly journals Power Series Representation Op logical Functions and its Applications to Error Detection and Error Correction Codes.(Dept.E)

2021 ◽  
Vol 18 (3) ◽  
pp. 1-12
Author(s):  
Yehia Enab ◽  
Fayez Zaki
Keyword(s):  
Power Series ◽  
Error Correction ◽  
Error Detection ◽  
Series Representation ◽  
Error Correction Codes ◽  
Logical Functions ◽  
Power Series Representation

scholarly journals Proposal of an Adaptive Fault Tolerance Mechanism to Tolerate Intermittent Faults in RAM

Electronics ◽  
2020 ◽  
Vol 9 (12) ◽  
pp. 2074
Author(s):  
J.-Carlos Baraza-Calvo ◽  
Joaquín Gracia-Morán ◽  
Luis-J. Saiz-Adalid ◽  
Daniel Gil-Tomás ◽  
Pedro-J. Gil-Vicente
Keyword(s):  
Fault Tolerance ◽  
Error Correction ◽  
Error Detection ◽  
Fault Injection ◽  
Error Correction Codes ◽  
Transient Faults ◽  
Tolerance Mechanism ◽  
Intermittent Faults ◽  
Risc Processor ◽  
Simulation Based

Due to transistor shrinking, intermittent faults are a major concern in current digital systems. This work presents an adaptive fault tolerance mechanism based on error correction codes (ECC), able to modify its behavior when the error conditions change without increasing the redundancy. As a case example, we have designed a mechanism that can detect intermittent faults and swap from an initial generic ECC to a specific ECC capable of tolerating one intermittent fault. We have inserted the mechanism in the memory system of a 32-bit RISC processor and validated it by using VHDL simulation-based fault injection. We have used two (39, 32) codes: a single error correction–double error detection (SEC–DED) and a code developed by our research group, called EPB3932, capable of correcting single errors and double and triple adjacent errors that include a bit previously tagged as error-prone. The results of injecting transient, intermittent, and combinations of intermittent and transient faults show that the proposed mechanism works properly. As an example, the percentage of failures and latent errors is 0% when injecting a triple adjacent fault after an intermittent stuck-at fault. We have synthesized the adaptive fault tolerance mechanism proposed in two types of FPGAs: non-reconfigurable and partially reconfigurable. In both cases, the overhead introduced is affordable in terms of hardware, time and power consumption.

Ultrafast Error Correction Codes for Double Error Detection/Correction

2016 ◽  
Author(s):  
Luis-J. Saiz-Adalid ◽  
Pedro Gil ◽  
Juan-Carlos Ruiz ◽  
Joaquin Gracia-Moran ◽  
Daniel Gil-Tomas ◽  
...  
Keyword(s):  
Error Correction ◽  
Error Detection ◽  
Error Correction Codes

scholarly journals Error Correction Codes Derived from Orthogonal Latin Square Codes

2019 ◽  
Vol 8 (2S8) ◽  
pp. 1948-1952
Keyword(s):  
Error Correction ◽  
Error Detection ◽  
Latin Square ◽  
Error Correction Codes ◽  
Modular Construction ◽  
Golay Code ◽  
Technology Scaling ◽  
Burst Error ◽  
Majority Logic Decoding ◽  
Ic Technology

The developments in IC technology and rapid increase of transistor densities and scaling factor, the use of ECC’s acquired prominence. Multiple bit errors in memories due to technology scaling demands advanced error correction codes. SEC-DEC, DEC, burst error detection, Golay code, Reed Solmon codes etc. have much decoding complexity and latency. The above drawbacks can be reduced with OLS codes. OLS codes with majority logic decoding technique, modular construction and simple decoding mechanisms it enables low delay improvements. MBU’S can be addressed using OLS-MLD codes. This paper presents a detail study of developments in multibit ECC’s using OLS-MLD mechanism

scholarly journals A radius of convexity problem

1981 ◽  
Vol 24 (3) ◽  
pp. 381-388 ◽  
Author(s):  
M.L. Mogra ◽  
O.P. Juneja
Keyword(s):  
Power Series ◽  
Unit Disc ◽  
Series Representation ◽  
Radius Of Convexity ◽  
Power Series Representation

The authors determine the sharp radius of convexity for functions analytic and starlike in the unit disc having power series representation of the form where an+1 is fixed. The estimate obtained is an improvement over the corresponding fixed second coefficient result. It is expected that this approach will lead to sharpening and improvement of a number of earlier known results.

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