Nonbinary Low-Density Parity Check Decoding Algorithm Research-Based Majority Logic Decoding

In the nonbinary low-density parity check (NB-LDPC) codes decoding algorithms, the iterative hard reliability based on majority logic decoding (IHRB-MLGD) algorithm has poor error correction performance. The essential reason is that the hard information is used in the initialization and iterative processes. For the problem of partial loss of information, when the reliability is assigned during initialization, the error correction performance is improved by modifying the assignment of reliability at initialization. The initialization process is determined by the probability of occurrence of the number of erroneous bits in the symbol and the Hamming distance. In addition, the IHRB-MLGD decoding algorithm uses the hard decision in the iterative decoding process. The improved algorithm adds soft decision information in the iterative process, which improves the error correction performance while only slightly increasing the decoding complexity, and improves the reliability accumulation process which makes the algorithm more stable. The simulation results indicate that the proposed algorithm has a better decoding performance than IHRB algorithm.

A New Efficient Technique Based on Majority Logic Decoding to Decode Linear Block Codes

One-Step Majority logic decoding (OSMLD) codes preset a very powerful error correcting schemes due to the simplicity of their decoder. However, families of these codes are limited to a few numbers. In this paper, we present a new adaptation which generalizes the majority-logic decoding for non OSMLD codes. This technique uses MIM method to select codewords from the dual of the code with last digit equal to one and then estimates the best threshold from which we obtain the best performance in term of the bit error rate (BER). The comparison between performances of the proposed technique and other coder/decoder schemes on AWGN (Additive White Gaussian Noise) channel proves its capacity in correcting more errors.

Error Correction Codes Derived from Orthogonal Latin Square Codes

The developments in IC technology and rapid increase of transistor densities and scaling factor, the use of ECC’s acquired prominence. Multiple bit errors in memories due to technology scaling demands advanced error correction codes. SEC-DEC, DEC, burst error detection, Golay code, Reed Solmon codes etc. have much decoding complexity and latency. The above drawbacks can be reduced with OLS codes. OLS codes with majority logic decoding technique, modular construction and simple decoding mechanisms it enables low delay improvements. MBU’S can be addressed using OLS-MLD codes. This paper presents a detail study of developments in multibit ECC’s using OLS-MLD mechanism