Surface Reinforcement Technology for Suppressing Hot-Carrier-Induced Degradations in p-GaN Gate Power HEMTs

Author(s):  
Li Zhang ◽  
Song Yang ◽  
Zheyang Zheng ◽  
Wenjie Song ◽  
Hang Liao ◽  
...  
1981 ◽  
Vol 42 (C7) ◽  
pp. C7-51-C7-56
Author(s):  
K. Aoki ◽  
T. Kobayashi ◽  
K. Yamamoto

1988 ◽  
Vol 49 (C4) ◽  
pp. C4-779-C4-782 ◽  
Author(s):  
C. BERGONZONI ◽  
R. BENECCHI ◽  
P. CAPRARA

1988 ◽  
Vol 49 (C4) ◽  
pp. C4-651-C4-655 ◽  
Author(s):  
R. BELLENS ◽  
P. HEREMANS ◽  
G. GROESENEKEN ◽  
H. E. MAES

1988 ◽  
Vol 49 (C4) ◽  
pp. C4-787-C4-790
Author(s):  
P. T.J. BIERMANS ◽  
T. POORTER ◽  
H. J.H. MERKS-EPPINGBROEK

Author(s):  
Franco Stellari ◽  
Peilin Song ◽  
James C. Tsang ◽  
Moyra K. McManus ◽  
Mark B. Ketchen

Abstract Hot-carrier luminescence emission is used to diagnose the cause of excess quiescence current, IDDQ, in a low power circuit implemented in CMOS 7SF technology. We found by optical inspection of the chip that the high IDDQ is related to the low threshold, Vt, device process and in particular to transistors with minimum channel length (0.18 μm). In this paper we will also show that it is possible to gain knowledge regarding the operating conditions of the IC from the analysis of optical emission due to leakage current, aside from simply locating defects and failures. In particular, we will show how it is possible to calculate the voltage drop across the circuit power grid from time-integrated acquisitions of leakage luminescence.


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