scholarly journals Injection-lock and reconfigurable charge-domain sampling mixers/filters for data communications over wireless channels.

2021 ◽  
Author(s):  
Yushi Zhou
Keyword(s):  
Impulse Response ◽  
Software Defined Radio ◽  
Wireless Channels ◽  
Injection Locking ◽  
Harmonic Oscillators ◽  
Closed Form Expression ◽  
Infinite Impulse Response ◽  
Mathematical Treatment ◽  
Data Communications ◽  
Simulation Results

This thesis provides a theoretical and experimental study of injection locking and reconfigurable charge-domain sampling mixers and filters for data communications over wireless channels. On injection-locking, the intrinsic relation between the characteristics of injection signals such as sinusoidal or square, single-tone or multi-tone, the type of oscillators under injection such as harmonic oscillators (passive or active LC oscillators) or non-harmonic oscillators (ring or relaxation oscillators), and the lock range of the oscillators under injection was investigated. For the very first time, we discovered the intrinsic relation between the lock range and the phase of multiple injections of harmonic oscillators. In addition, we obtained the closed-form expression of the lock range of harmonic oscillators with square-wave injections. Moreover, we obtained the distinct characteristics of the lock range of harmonic and non-harmonic oscillators and that of different types of non-harmonic oscillators. These theoretical findings were not known before and were validated using simulation results. On reconfigurable charge-domain sampling mixers and filters for software-defined radio, a novel quadrature charge-domain down-conversion sampling mixer with embedded finite-impulse-response (FIR), infinite-impulse-response (IIR), and 4-path bandpass filters was developed. An in-depth investigation of the principles of periodic impulse sampling, periodic windowed sampling, and periodic N-path windowed sampling was presented and a detailed mathematical treatment of charge-domain windowed samplers with built-in sinc, FIR and IIR filters was provided. The proposed quadrature charge-domain sampler with embedded FIR, IIR, and 4-path band-pass filters was implemented in IBM 130 nm 1.2V CMOS technology and its performance was validated both using simulation results and on-wafer measurement.

scholarly journals Injection-lock and reconfigurable charge-domain sampling mixers/filters for data communications over wireless channels.

2021 ◽  
Author(s):  
Yushi Zhou
Keyword(s):  
Impulse Response ◽  
Software Defined Radio ◽  
Wireless Channels ◽  
Injection Locking ◽  
Harmonic Oscillators ◽  
Closed Form Expression ◽  
Infinite Impulse Response ◽  
Mathematical Treatment ◽  
Data Communications ◽  
Simulation Results

This thesis provides a theoretical and experimental study of injection locking and reconfigurable charge-domain sampling mixers and filters for data communications over wireless channels. On injection-locking, the intrinsic relation between the characteristics of injection signals such as sinusoidal or square, single-tone or multi-tone, the type of oscillators under injection such as harmonic oscillators (passive or active LC oscillators) or non-harmonic oscillators (ring or relaxation oscillators), and the lock range of the oscillators under injection was investigated. For the very first time, we discovered the intrinsic relation between the lock range and the phase of multiple injections of harmonic oscillators. In addition, we obtained the closed-form expression of the lock range of harmonic oscillators with square-wave injections. Moreover, we obtained the distinct characteristics of the lock range of harmonic and non-harmonic oscillators and that of different types of non-harmonic oscillators. These theoretical findings were not known before and were validated using simulation results. On reconfigurable charge-domain sampling mixers and filters for software-defined radio, a novel quadrature charge-domain down-conversion sampling mixer with embedded finite-impulse-response (FIR), infinite-impulse-response (IIR), and 4-path bandpass filters was developed. An in-depth investigation of the principles of periodic impulse sampling, periodic windowed sampling, and periodic N-path windowed sampling was presented and a detailed mathematical treatment of charge-domain windowed samplers with built-in sinc, FIR and IIR filters was provided. The proposed quadrature charge-domain sampler with embedded FIR, IIR, and 4-path band-pass filters was implemented in IBM 130 nm 1.2V CMOS technology and its performance was validated both using simulation results and on-wafer measurement.

Design and implementation of pervasive DA based FIR filter and feeder register based multiplier for software definedradio networks

2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Mohan Kumar ◽  
Ranga Raju
Keyword(s):  
Energy Efficiency ◽  
Impulse Response ◽  
Power Dissipation ◽  
Software Defined Radio ◽  
Finite Impulse Response ◽  
Digital Signal ◽  
Fir Filter ◽  
Infinite Impulse Response ◽  
Content Type ◽  
Field Programmable

Purpose Digital signal processing (DSP) applications such as finite impulse response (FIR) filter, infinite impulse response and wavelet transformation functions are mainly constructed using multipliers and adders. The performance of any digital applications is dependent on larger size multipliers, area and power dissipation. To optimize power and area, an efficient zero product and feeder register-based multiplier (ZP and FRBM) is proposed. Another challenging task in multipliers is summation of partial products (PP), results in more delay. To address this issue, the modified parallel prefix adder (PPA) is incorporated in multiplier design. In this work, different methods are studied and analyzed for designing FIR filter, optimized with respect to area, power dissipation, speed, throughput, latency and hardware utilization. Design/methodology/approach The distributed arithmetic (DA)-based reconfigurable FIR design is found to be suitable filter for software-defined radio (SDR) applications. The performance of adder and multipliers in DA-FIR filter restricts the area and power dissipation due to their complexity in terms of generation of sum and carry bits. The hardware implementation time of an adder can be reduced by using PPA which is based on Ling equation. The MDA-RFIR filter is designed for higher filter length (N), i.e. N = 64 with 64 taps and this design is developed using Verilog hardware description language (HDL) and implemented on field-programmable gate array. The design is validated for SDR channel equalizer; both RFIR and SDR are integrated as single system and implemented on Artix-7 development board of part name XC7A100tCSG324. Findings The MDA-RFIR for N = 64 is optimized about 33% in terms of area-delay, power-speed product and energy efficiency. The theoretical and practical comparisons have been done, and the practically obtained results are compared with existing DA-RFIR designs in terms of throughput, latency, area-delay, power-speed product and energy efficiency are better about 3.5 times, 31, 45 and 29%, respectively. Originality/value The MDA-RFIR for N = 64 is optimized about 33% in terms of area-delay, power-speed product and energy efficiency.

Fixed-Point Implementation of Infinite Impulse Response Notch Filters

2010 ◽  
Vol 17 (2) ◽  
Author(s):  
Eduardo Pinheiro ◽  
Octavian Postolache ◽  
Pedro Girão
Keyword(s):  
Fixed Point ◽  
Impulse Response ◽  
Infinite Impulse Response ◽  
Notch Filters

scholarly journals NANO-studio, the design environment of filter banks implemented in standard CMOS technology

2021 ◽  
Author(s):  
Andrzej Handkiewicz ◽  
Mariusz Naumowicz
Keyword(s):  
Impulse Response ◽  
Filter Banks ◽  
Finite Impulse Response ◽  
Infinite Impulse Response ◽  
Cmos Process ◽  
Digital Cmos ◽  
Additional Advantage ◽  
Analysis And Synthesis ◽  
Optimization Parameters ◽  
Synthesis Filter

AbstractThe paper presents a method of optimizing frequency characteristics of filter banks in terms of their implementation in digital CMOS technologies in nanoscale. Usability of such filters is demonstrated by frequency-interleaved (FI) analog-to-digital converters (ADC). An analysis filter present in these converters was designed in switched-current technique. However, due to huge technological pitch of standard digital CMOS process in nanoscale, its characteristics substantially deviate from the required ones. NANO-studio environment presented in the paper allows adjustment, with transistor channel sizes as optimization parameters. The same environment is used at designing a digital synthesis filter, whereas optimization parameters are input and output conductances, gyration transconductances and capacitances of a prototype circuit. Transition between analog s and digital z domains is done by means of bilinear transformation. Assuming a lossless gyrator-capacitor (gC) multiport network as a prototype circuit, both for analysis and synthesis filter banks in FI ADC, is an implementation of the strategy to design filters with low sensitivity to parameter changes. An additional advantage is designing the synthesis filter as stable infinite impulse response (IIR) instead of commonly used finite impulse response (FIR) filters. It provides several dozen-fold saving in the number of applied multipliers.. The analysis and synthesis filters in FI ADC are implemented as filter pairs. An additional example of three-filter bank demonstrates versatility of NANO-studio software.

A numerical and experimental implementation and integration of Steiglitz–McBride algorithm with the frequency domain IIR filtering technique for active vibration control

2016 ◽  
Vol 24 (6) ◽  
pp. 1086-1100
Author(s):  
Utku Boz ◽  
Ipek Basdogan
Keyword(s):  
Computational Complexity ◽  
Vibration Control ◽  
Frequency Domain ◽  
Impulse Response ◽  
Time Domain ◽  
Vibration Suppression ◽  
Active Vibration Control ◽  
Infinite Impulse Response ◽  
Iir Filter ◽  
Active Vibration

In adaptive control applications for noise and vibration, finite ımpulse response (FIR) or ınfinite ımpulse response (IIR) filter structures are used for online adaptation of the controller parameters. IIR filters offer the advantage of representing dynamics of the controller with smaller number of filter parameters than with FIR filters. However, the possibility of instability and convergence to suboptimal solutions are the main drawbacks of such controllers. An IIR filtering-based Steiglitz–McBride (SM) algorithm offers nearly-optimal solutions. However, real-time implementation of the SM algorithm has never been explored and application of the algorithm is limited to numerical studies for active vibration control. Furthermore, the prefiltering procedure of the SM increases the computational complexity of the algorithm in comparison to other IIR filtering-based algorithms. Based on the lack of studies about the SM in the literature, an SM time-domain algorithm for AVC was implemented both numerically and experimentally in this study. A methodology that integrates frequency domain IIR filtering techniques with the classic SM time-domain algorithm is proposed to decrease the computational complexity. Results of the proposed approach are compared with the classical SM algorithm. Both SM and the proposed approach offer multimodal vibration suppression and it is possible to predict the performance of the controller via simulations. The proposed hybrid approach ensures similar vibration suppression performance compared to the classical SM and offers computational advantage as the number of control filter parameters increases.

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