scholarly journals Pulse-Width Modulation Template for Five-Level Switch-Clamped H-Bridge-Based Cascaded Multilevel Inverter

Energies ◽  
2021 ◽  
Vol 14 (22) ◽  
pp. 7726
Author(s):  
Charles Ikechukwu Odeh ◽  
Dmytro Kondratenko ◽  
Arkadiusz Lewicki ◽  
Marcin Morawiec ◽  
Andrzej Jąderko ◽  
...  

This article presents a carrier-based pulse-width modulation (PWM) template for a 5-level, H bridge-based cascaded multilevel inverter (MLI). The developed control concept generates adequate modulation template for this inverter topology wherein a sinusoidal modulating waveform is modified to fit in a single triangular carrier signal range. With this modulation approach, classical multiplicity and synchronization of the triangular carrier signals criterion for the extension of sinusoidal pulse-width modulation, SPWM, to several cascaded 5-level, H-bridge-based MLI topology are removed. The proposed template can be used on the inverter configuration of any level with no further control modification. Nearly even distribution of switching pulses and equalized individual cascaded cell output power were achieved with the proposed modulation scheme. Three 5-level, H-bridge-based MLI units were cascaded for 1-phase, 13-level inverter operation; simulation and experimental results are adequately presented.

Author(s):  
S. Usha ◽  
C. Subramani ◽  
A. Geetha

This paper deals with the design of cascaded 11 level H- bridge inverter. It includes a comparison between the 11 level H-bridge and T-bridge multilevel inverter. The cascaded inverter of higher level is a very effective and practical solution for reduction of total harmonic distortion (THD).These cascaded multilevel inverter can be used for higher voltage applications with more stability. As the level is increased the output waveform becomes more sinusoidal in nature. The inverter is designed using multicarrier sinusoidal pulse width modulation technique for generating triggering pulses for the semiconductor switches used in the device. Through this paper it will be proved that a cascaded multilevel H-bridge topology has higher efficiency than a T-bridge inverter, as whichever source input voltage is provided since input is equal to the output voltage. In T-bridge inverter, the output obtained is half of the applied input, so efficiency is just half as compared to H-bridge. The output waveform is distorted and has higher THD.  The simulation is performed using MATLAB /Simulink 2013 software.


The Multilevel Z sources Inverter have been documented as attractive topologies used for elevated voltage adaptation. As the digit of levels improved, the synthesized set of steps output waveform have many ladder, imminent the preferred sine waveform but the major weakness of MLI be its amplitude of ac output voltage is imperfect to DC input sources voltage summing up. To conquer this drawback seven level cascading symmetric multilevel inverter based Z source inverter have been projected. This work focuses on different multi-carrier sinusoidal PWM scheme for the seven level three phase Z source symmetric cascading inverter. Performance parameters of seven level three phase Z source symmetric cascading inverter has been analyzed. A simulation circuit model of seven level three phase Z source symmetric cascading inverter urbanized using MATLAB/SIMULINK and its presentation have been urbanized.


Author(s):  
Periyaazhagar D ◽  
Irusapparajan G

In this paer, the suggested topologies are gained by cascading a full bridge inverter with dissimilar DC sources. This topology has a several new patterns adopting the fixed switching frequency, multicarrier control freedom degree with mixture conceptions are established and simulated for the preferred three-phase cascaded multilevel inverter. In outstanding switching arrangement terminations, there are convinced degrees of freedom to produce the nine level AC output voltages with terminated switching positions for producing altered output voltages. These investigations focus on asymmetrical cascaded multilevel inverter engaging with carrier overlapping pulse width modulation (PWM) topologies. These topologies offer less amount of harmonics present in the output voltage and superior root mean square (RMS) values of the output voltages associated with the traditional sinusoidal pulse width modulation. This research studies carries with it MATLAB/SIMULINK based simulation and experimental results obtained using appropriated prototype to prove the validity of the proposed concept.


2021 ◽  
Author(s):  
Baharuddin Ismail ◽  
Muzamir Isa ◽  
M. Z. Aikhsan ◽  
M. N. K. H. Rohani ◽  
C. L. Wooi ◽  
...  

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