scholarly journals Design of Pseudo Random Number Generator using Linear Feedback Shift Register

Nowadays security has become a great concern in the field of computer science and information technology. In order to protect data from unintended users and to achieve a desirable level of security, several cryptographic algorithms based on various technology have been proposed. Linear Feedback Shift Register (LFSR) may play an important role in the design of such cryptographic algorithms. LFSR based cryptographic algorithms are often lightweight in nature and are more suitable for resource constraining devices. In this paper we present a detailed analysis of LFSR and design of LFSR to implement cryptographic algorithms.

Author(s):  
HARSH KUMAR VERMA ◽  
RAVINDRA KUMAR SINGH

Linear Feedback Shift Register based Unique Random Number Generator is an enhancement of Random Number generator with the additional property that any number generated by a unique random number generator can’t be duplicated. As per users demand for not duplicated random numbers in some applications like transferring a random number over the network on the behalf of actual character of the message for security point of view, existence of unique random number generators are very essential. In this paper LFSR [1] (Linear Feedback Shift Register) is used to implement the proposed concept of unique random number generator. Using LFSR is a faster approach for generating random sequences because it requires only X-OR operations and shift registers that’s why its implementation is very easy in software as well as in hardware [2, 3]. We can easily modify the LFSR and produce different random sequences. So it is the best option for using LFSR in unique random number generator.


2016 ◽  
Vol 12 (2) ◽  
pp. 155-160 ◽  
Author(s):  
Saad Falih

This paper presents a simple method for the design of Chaotic Linear Feedback Shift Register (CLFSR) system. The proposed method is based on a combination of two known systems. The first is called Linear Feedback Shift Register (LFSR) system, and the other is called Chaotic Map system. The main principle of the proposed system is that, the output of the LFSR is modified by exclusive-or (XOR) it with the stream bit that is generated by using the chaotic map system to eliminate the linearity and the repeating in the output of the LFSR system. The proposed system is built under Matlab environment and the quality of sequence generation tested by using standard tests which shows that the proposed system is a good random number generator that overcome the linearity and repeating disadvantages.


2013 ◽  
Vol 16 (2) ◽  
pp. 210-216 ◽  
Author(s):  
Sattar B. Sadkhan ◽  
◽  
Sawsan K. Thamer ◽  
Najwan A. Hassan ◽  
◽  
...  

Cryptography ◽  
2021 ◽  
Vol 5 (1) ◽  
pp. 8
Author(s):  
Bertrand Cambou ◽  
Donald Telesca ◽  
Sareh Assiri ◽  
Michael Garrett ◽  
Saloni Jain ◽  
...  

Schemes generating cryptographic keys from arrays of pre-formed Resistive Random Access (ReRAM) cells, called memristors, can also be used for the design of fast true random number generators (TRNG’s) of exceptional quality, while consuming low levels of electric power. Natural randomness is formed in the large stochastic cell-to-cell variations in resistance values at low injected currents in the pre-formed range. The proposed TRNG scheme can be designed with three interconnected blocks: (i) a pseudo-random number generator that acts as an extended output function to generate a stream of addresses pointing randomly at the array of ReRAM cells; (ii) a method to read the resistance values of these cells with a low injected current, and to convert the values into a stream of random bits; and, if needed, (iii) a method to further enhance the randomness of this stream such as mathematical, Boolean, and cryptographic algorithms. The natural stochastic properties of the ReRAM cells in the pre-forming range, at low currents, have been analyzed and demonstrated by measuring a statistically significant number of cells. Various implementations of the TRNGs with ReRAM arrays are presented in this paper.


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