scholarly journals RESTful Web Services on Standalone Disaggregated FPGAs

2021 ◽  
Author(s):  
Raphael Polig ◽  
Jagath Weerasinghe ◽  
Christoph Hagleitner
Keyword(s):  
Web Services ◽  
Web Service ◽  
Language Processing ◽  
Gate Arrays ◽  
Field Programmable ◽  
Programmable Gate Arrays ◽  
Configurable Hardware ◽  
Restful Web Services ◽  
Cloud Applications ◽  
Server Infrastructure

We present an architecture for field-programmable gate arrays (FPGAs) to expose RESTful web services. This architecture allows clients to access accelerated web services from any platform and programming language that can perform RESTful API calls. By using this architecture, the client's application benefits from a high throughput and low latency web service interface. Traditionally, FPGAs are deployed in CPU-centric infrastructures as worker devices in the form of accelerators. However, for FPGA-centric applications, the overhead of a host CPU diminishes the performance, scalability and energy efficiency. cloudFPGA solves these issues by deploying FPGAs as standalone, disaggregated resources in the DC. Building on top of the cloudFPGA platform, the presented architecture simplifies the integration of FPGA-accelerated functions with cloud applications. A configurable hardware block that can be generated from an OpenAPI-based specification of the web service is used to deploy an FPGA-based application. We compare a natural language processing (NLP) application that is exposed as a web service using the traditional server infrastructure and our RESTful service layer. Measurements show an improvement of 20x in terms of throughput and 4x reduction in mean latency.

scholarly journals RESTful Web Services on Standalone Disaggregated FPGAs

2021 ◽  
Author(s):  
Raphael Polig ◽  
Jagath Weerasinghe ◽  
Christoph Hagleitner
Keyword(s):  
Web Services ◽  
Web Service ◽  
Language Processing ◽  
Gate Arrays ◽  
Field Programmable ◽  
Programmable Gate Arrays ◽  
Configurable Hardware ◽  
Restful Web Services ◽  
Cloud Applications ◽  
Server Infrastructure

We present an architecture for field-programmable gate arrays (FPGAs) to expose RESTful web services. This architecture allows clients to access accelerated web services from any platform and programming language that can perform RESTful API calls. By using this architecture, the client's application benefits from a high throughput and low latency web service interface. Traditionally, FPGAs are deployed in CPU-centric infrastructures as worker devices in the form of accelerators. However, for FPGA-centric applications, the overhead of a host CPU diminishes the performance, scalability and energy efficiency. cloudFPGA solves these issues by deploying FPGAs as standalone, disaggregated resources in the DC. Building on top of the cloudFPGA platform, the presented architecture simplifies the integration of FPGA-accelerated functions with cloud applications. A configurable hardware block that can be generated from an OpenAPI-based specification of the web service is used to deploy an FPGA-based application. We compare a natural language processing (NLP) application that is exposed as a web service using the traditional server infrastructure and our RESTful service layer. Measurements show an improvement of 20x in terms of throughput and 4x reduction in mean latency.

scholarly journals Zi-CAM: A Power and Resource Efficient Binary Content-Addressable Memory on FPGAs

Electronics ◽  
2019 ◽  
Vol 8 (5) ◽  
pp. 584 ◽  
Author(s):  
Muhammad Irfan ◽  
Zahid Ullah ◽  
Ray C. C. Cheung
Keyword(s):  
Clock Cycle ◽  
Random Access ◽  
Packet Classification ◽  
Switching Activity ◽  
Content Addressable Memory ◽  
Gate Arrays ◽  
Lut Block ◽  
Field Programmable ◽  
Programmable Gate Arrays ◽  
Configurable Hardware

Content-addressable memory (CAM) is a type of associative memory, which returns the address of a given search input in one clock cycle. Many designs are available to emulate the CAM functionality inside the re-configurable hardware, field-programmable gate arrays (FPGAs), using static random-access memory (SRAM) and flip-flops. FPGA-based CAMs are becoming popular due to the rapid growth in software defined networks (SDNs), which uses CAM for packet classification. Emulated designs of CAM consume much dynamic power owing to a high amount of switching activity and computation involved in finding the address of the search key. In this paper, we present a power and resource efficient binary CAM architecture, Zi-CAM, which consumes less power and uses fewer resources than the available architectures of SRAM-based CAM on FPGAs. Zi-CAM consists of two main blocks. RAM block (RB) is activated when there is a sequence of repeating zeros in the input search word; otherwise, lookup tables (LUT) block (LB) is activated. Zi-CAM is implemented on Xilinx Virtex-6 FPGA for the size 64 × 36 which improved power consumption and hardware cost by 30 and 32%, respectively, compared to the available FPGA-based CAMs.

scholarly journals FPGA-Based Controller for a Hybrid Grid-Connected PV/Wind/Battery Power System with AC Load

Energies ◽  
2021 ◽  
Vol 14 (8) ◽  
pp. 2108
Author(s):  
Mohamed Yassine Allani ◽  
Jamel Riahi ◽  
Silvano Vergura ◽  
Abdelkader Mami
Keyword(s):  
Fuzzy Logic ◽  
Hybrid System ◽  
High Voltage ◽  
Field Programmable Gate Arrays ◽  
Energy System ◽  
Maximum Power ◽  
Hybrid Energy ◽  
Gate Arrays ◽  
Field Programmable ◽  
Programmable Gate Arrays

The development and optimization of a hybrid system composed of photovoltaic panels, wind turbines, converters, and batteries connected to the grid, is first presented. To generate the maximum power, two maximum power point tracker controllers based on fuzzy logic are required and a battery controller is used for the regulation of the DC voltage. When the power source varies, a high-voltage supply is incorporated (high gain DC-DC converter controlled by fuzzy logic) to boost the 24 V provided by the DC bus to the inverter voltage of about 400 V and to reduce energy losses to maximize the system performance. The inverter and the LCL filter allow for the integration of this hybrid system with AC loads and the grid. Moreover, a hardware solution for the field programmable gate arrays-based implementation of the controllers is proposed. The combination of these controllers was synthesized using the Integrated Synthesis Environment Design Suite software (Version: 14.7, City: Tunis, Country: Tunisia) and was successfully implemented on Field Programmable Gate Arrays Spartan 3E. The innovative design provides a suitable architecture based on power converters and control strategies that are dedicated to the proposed hybrid system to ensure system reliability. This implementation can provide a high level of flexibility that can facilitate the upgrade of a control system by simply updating or modifying the proposed algorithm running on the field programmable gate arrays board. The simulation results, using Matlab/Simulink (Version: 2016b, City: Tunis, Country: Tunisia, verify the efficiency of the proposed solution when the environmental conditions change. This study focused on the development and optimization of an electrical system control strategy to manage the produced energy and to coordinate the performance of the hybrid energy system. The paper proposes a combined photovoltaic and wind energy system, supported by a battery acting as an energy storage system. In addition, a bi-directional converter charges/discharges the battery, while a high-voltage gain converter connects them to the DC bus. The use of a battery is useful to compensate for the mismatch between the power demanded by the load and the power generated by the hybrid energy systems. The proposed field programmable gate arrays (FPGA)-based controllers ensure a fast time response by making control executable in real time.

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