A high-definition imaging and processing system is presented, which consists of a color CMOS image sensor, SRAM, CPLD and DSP. The CPLD implements the logic and timing control to the system. SRAM stores the image data, and DSP controls the image acquisition system through the SCCB. The timing sequence of the CMOS image sensor OV9620 is analyzed. The imaging part and the high speed image data memory unit are designed. The hardware design of the imaging system and processing algorithm are given. Because the CMOS digital cameras use color filter arrays to sample different spectral components, such as red, green, and blue, at the location of each pixel only one color sample is taken, and the other colors must be interpolated from neighboring samples. We use the edge-oriented adaptive interpolation algorithm for the edge pixels and bilinear interpolation algorithm for the non-edge pixels to improve the visual image quality. This method can get high processing speed, decrease the computational complexity, and effectively preserve the image edges.
DENOISING ALGORITHM FOR THE PIXEL-RESPONSE NON-UNIFORMITY CORRECTION OF A SCIENTIFIC CMOS UNDER LOW LIGHT CONDITIONS
