Optimization of CMOS Quadrature VCO Using a Graphical Method

2012 ◽  
pp. 89-103
Author(s):  
Hassene Mnif ◽  
Dorra Mellouli ◽  
Mourad Loulou
Keyword(s):  
Phase Noise ◽  
Noise Analysis ◽  
Phase Error ◽  
Cmos Process ◽  
Optimization Approach ◽  
Voltage Controlled Oscillators ◽  
Current Consumption ◽  
Quadrature Vco ◽  
Oscillator Phase Noise ◽  
Lc Tank

This chapter describes the design and the optimization of Quadrature Voltage Controlled Oscillators (QVCOs) based on the coupling of two LC-tank VCO. This work covers the phase noise analysis, a graphical optimization approach, already used to optimize LC oscillator phase noise (Andreani, Bonfanti, Romano, & Samori, 2002), to optimize QVCO phase noise while satisfying design constraints such as power dissipation, tank amplitude, tuning range and start up condition. The cross-coupling transistors impact on phase noise for different configurations is especially addressed. The obtained BS-QVCO, using 0.35µm CMOS process, can be tuned between 2.2GHz and 2.58GHz, and shows a phase noise of -129 dBc/Hz at 1MHz offset from a 2.4 GHz carrier, for a current consumption of 9.25mW. The equivalent phase error and amplitude error between I and Q signals are respectively 0.65° and 1.87%.

Ring Oscillator Phase Noise Properties due to PSN with Deterministic Frequency

2012 ◽  
Vol 496 ◽  
pp. 527-533
Author(s):  
Na Bai ◽  
Hong Gang Zhou ◽  
Qiu Lei Wu ◽  
Chun Yu Peng
Keyword(s):  
Phase Noise ◽  
Ring Oscillator ◽  
Cmos Process ◽  
Analysis Method ◽  
Noise Performance ◽  
Supply Noise ◽  
Total Phase ◽  
Phase Noise Performance ◽  
Oscillator Phase Noise ◽  
Oscillator Phase

In this paper, ring oscillator phase noise caused by power supply noise (PSN) with deterministic frequency is analyzed. Results show that phase noise caused by deterministic noise is only an impulse series. Compared with the jitter caused by PSN, the phase noise caused by PSN with deterministic frequency contributes considerably less to total phase noise performance. To verify the analysis method, a CMOS ring oscillator is designed and fabricated using SMIC 0.13 µm CMOS process. Comparisons between the analytical results and measurements prove the accuracy of the proposed method

scholarly journals A Phase Noise Analysis Method for Millimeter-Wave Passive Imager BHU-2D-U Frequency Synthesizer

2013 ◽  
Vol 2013 ◽  
pp. 1-8
Author(s):  
Jin Zhang ◽  
Cheng Zheng ◽  
Xianxun Yao ◽  
Baohua Yang
Keyword(s):  
Phase Noise ◽  
Millimeter Wave ◽  
Error Control ◽  
Frequency Synthesizer ◽  
Noise Analysis ◽  
Phase Error ◽  
Intermediate Frequency ◽  
Analysis Method ◽  
Noise Effects ◽  
Offset Frequency

A nontrivial phase noise analysis method is proposed for frequency synthesizer of a passive millimeter-wave synthetic aperture interferometric radiometer (SAIR) imager for concealed weapon detections on human bodies with high imaging rates. The frequency synthesizer provides local oscillator signals for both millimeter-wave front ends and intermediate frequency IQ demodulators for the SAIR system. The influence of synthesizer phase noise in different offset frequency ranges on the visibility phase errors has been systematically investigated with noise requirements drawn, and the integrated RMS phase error could represent uncorrelated phase noise effects in the most critical offset frequency range for visibility error control. An analytical phase noise simulation method is proposed to guide synthesizer design. To conclude, the phase noise effects on SAIR visibility errors have been concretized to noise design requirements, and good agreements have been observed between simulation and measurement results. The frequency synthesizer designed has been successfully in operation in BHU-2D-U system.

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