Design of an Output-Capacitorless LDO Regulator with Adaptive Power Transistors

2014 ◽  
Vol 631-632 ◽  
pp. 322-326
Author(s):  
Shang Sheng Chi ◽  
Wei Hu ◽  
Yu Sen Xu ◽  
Ming Hui Fan

This paper presents a bandgap reference and an output-capacitorless LDO regulator with adaptive power transistors. The bandgap reference consists of a current reference circuit, a bipolar transistor and proportional-to-absolute-temperature (PTAT) voltage generators. The proposed LDO improves load transient and light load efficiency by permitting the regulator to transform itself between 2-stage and 3-stage topologies, depending on the load current condition. Cadence simulation with SMIC 0.18 μm process shows that the bandgap reference generates a reference voltage 569 mV and the quiescent current is only 0.23 μA, the proposed LDO generates an output voltage 1 V, the quiescent current is 0.88 μA (including bandgap reference) at no-load condition, the undershoot /overshoot voltage is 187 mV/152 mV and the settling time is 5 μs as load current suddenly changes from 0 to 100 mA, or vice versa.

Circuit World ◽  
2017 ◽  
Vol 43 (4) ◽  
pp. 141-144
Author(s):  
Songlin Wang ◽  
Shuang Feng ◽  
Hui Wang ◽  
Yu Yao ◽  
Jinhua Mao ◽  
...  

Purpose This paper aims to design a new bandgap reference circuit with complementary metal–oxide–semiconductor (CMOS) technology. Design/methodology/approach Different from the conventional bandgap reference circuit with operational amplifiers, this design directly connects the two bases of the transistors with both the ends of the resistor. The transistor acts as an amplifier to amplify the change of voltage, which is convenient for the feedback regulation of low dropout regulator (LDO) regulator circuit, at last to realize the temperature control. In addition, introducing the depletion-type metal–oxide–semiconductor transistor and the transistor operating in the saturation region through the connection of the novel circuit structure makes a further improvement on the performance of the whole circuit. Findings This design is base on the 0.18?m process of BCD, and the new bandgap reference circuit is verified. The results show that the circuit design not only is simple and novel but also can effectively improve the performance of the circuit. Bandgap voltage reference is an important module in integrated circuits and electronic systems. To improve the stability and performance of the whole circuit, simple structure of the bandgap reference voltage source is essential for a chip. Originality/value This paper adopts a new circuit structure, which directly connects the two base voltages of the transistors with the resistor. And the transistor acts as an amplifier to amplify the change of voltage, which is convenient for the feedback regulation of LDO regulator circuit, at last to realize the temperature control.


2014 ◽  
Vol 981 ◽  
pp. 66-69
Author(s):  
Ming Yuan Ren ◽  
En Ming Zhao

This paper presents a design and analysis method of a bandgap reference circuit. The Bandgap design is realized through the 0.18um CMOS process. Simulation results show that the bandgap circuit outputs 1.239V in the typical operation condition. The variance rate of output voltage is 0.016mV/°C? with the operating temperature varying from-60°C? to 160°C?. And it is 3.27mV/V with the power supply changes from 1.8V to 3.3V.


2012 ◽  
Vol 591-593 ◽  
pp. 2632-2635
Author(s):  
Lee Chu Liang ◽  
Roslina Mohd Sidek

A low power low-dropout (LDO) voltage regulator with self-reduction quiescent current is proposed in this paper. This proposed capacitorless LDO for Silicon-on-Chip (SoC) application has introduced a self-adjustable low-impedance circuitry at the output of LDO to attain stability critically during low output load current (less than a few hundred of micro-ampere). When the LDO load current increases, it reduces the LDO output impedance and moved the pole towards higher frequency away from the dominant pole and improving the system stability. When this happen, less amount of quiescent current is needed for the low-impedance circuitry to sustain the low output impedance. In this proposed LDO, the quiescent current that been used to sustain the low output impedance will be self-reduced when the output load current increases. Thus, the reduction of quiescent current at low output load current has tremendously improved the efficiency. The simulation results have shown a promising stability at low load current 0~1mA. The dropout voltage for this LDO is only 100mV at 1.2V supply. The proposed LDO is validated using Silterra 0.13μm CMOS process model and designed with high efficiency at low output load current.


Sign in / Sign up

Export Citation Format

Share Document