Design of bandgap reference circuit with continuously adjustable temperature coefficient

A low temperature coefficient, high voltage detection circuit used in Power over Ethernet is proposed. This circuit realizes the detection comparison without utilizing an extra voltage reference circuit and comparator while the temperature coefficient of the threshold voltage is as low as that of a regular bandgap reference. The proposed detection circuit is implemented in CSMC 0.5μm 60V BCD process, Cadence Spectre simulation results show that the temperature coefficient of the threshold voltage is 66.5 ppm/°C over the temperature range of -40°C to 125°C, and the maximum variation of the threshold voltage is 2.7% under all corners.

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A low power CMOS current mode bandgap reference circuit with low temperature coefficient of output voltage

2012 Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics ◽

10.1109/primeasia.2012.6458643 ◽

2012 ◽

Cited By ~ 3

Author(s):

Mahesh Kumar Adimulam ◽

Krishna Kumar Movva

Keyword(s):

Low Temperature ◽

Low Power ◽

Temperature Coefficient ◽

Output Voltage ◽

Current Mode ◽

Bandgap Reference ◽

Reference Circuit ◽

Low Power Cmos

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Design of a Bandgap Reference Circuit with Ultra-low Temperature Coefficient

10.1109/asicon52560.2021.9620331 ◽

2021 ◽

Author(s):

Xinsheng Wang ◽

Chunyang Bai

Keyword(s):

Low Temperature ◽

Temperature Coefficient ◽

Bandgap Reference ◽

Reference Circuit

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A CMOS Bandgap Reference Circuit with a Temperature Coefficient Adjustment Block

Journal of Integrated Circuits and Systems ◽

10.29292/jics.v9i1.385 ◽

2014 ◽

Vol 9 (1) ◽

pp. 16-24

Author(s):

Eder Issao Ishibe ◽

João Navarro

Keyword(s):

Temperature Coefficient ◽

Power Supply ◽

Cmos Technology ◽

Reference Voltage ◽

Voltage Source ◽

Bandgap Reference ◽

Voltage Output ◽

Current Consumption ◽

Reference Circuit ◽

Reference Voltage Source

A bandgap reference voltage source with a temperature coefficient adjustment block was proposed. The bandgap topology employs current summation and the circuit was designed through metaheuristic algorithms in a 0.35-mm CMOS technology. Simulations with typical parameters show that the designed circuit has temperature coefficient of 15 ppm/0C, line regulation of 263 ppm/V, and current consumption of 2.71 uA in 1.0 V power supply. An additional 3-bit temperature adjustment block allowed keeping the temperature coefficient values lower than 26.6 ppm/0C for 90% of the circuits, without interfering with the reference voltage output or line regulation values.

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