A Simplified Model of Write Amplification for Solid State Drives Adopting Page-Level Address Translation Mechanism

2011 ◽  
Vol 383-390 ◽  
pp. 2156-2160
Author(s):  
Wei Neng Wang ◽  
Zong Chao Wang ◽  
Kai Ni ◽  
Yi Zhao ◽  
Jian She Ma ◽  
...  
Keyword(s):  
Solid State ◽  
Probability Model ◽  
Storage Device ◽  
Solid State Drives ◽  
Address Translation ◽  
Write Amplification ◽  
Translation Mechanism ◽  
Shock Resistance ◽  
Parameter Ranges ◽  
Mapping Scheme

Due to its advantages, such as shock resistance, low power consumption, and so on, solid state drives are considered as a next generation storage device. And write amplification is a very import system parameter for evaluating performance. To simplify the analytical model of write amplification for solid state drives adopting page-level address translation mechanism, this paper proposes a probability model. Furthermore, numerical results based on our proposed probability model are also obtained. This paper can pose as a guideline for a first-order estimation of the write amplification for parameter ranges in solid state drives taking page mapping scheme.

scholarly journals IBU: An In-block Update Address Mapping Scheme for Solid-state Drives

IEEE Access ◽  
2021 ◽  
pp. 1-1
Author(s):  
Reza Gholami Taghizadeh ◽  
Mohammadreza Binesh Marvasti ◽  
Seyyed Amir Asghari ◽  
Ramin Gholami Taghizadeh ◽  
Morteza Nabavi ◽  
...  
Keyword(s):  
Solid State ◽  
Solid State Drives ◽  
Address Mapping ◽  
Mapping Scheme

scholarly journals Exploiting Internal Parallelism for Address Translation in Solid-State Drives

2018 ◽  
Vol 14 (4) ◽  
pp. 1-30 ◽  
Author(s):  
Wei Xie ◽  
Yong Chen ◽  
Philip C. Roth
Keyword(s):  
Solid State ◽  
Solid State Drives ◽  
Address Translation

scholarly journals CRIM: Conditional Remapping to Improve the Reliability of Solid-State Drives with Minimizing Lifetime Loss

2018 ◽  
Vol 2018 ◽  
pp. 1-10
Author(s):  
Youngpil Kim ◽  
Hyunchan Park ◽  
Cheol-Ho Hong ◽  
Chuck Yoo
Keyword(s):  
Solid State ◽  
Bit Error Rate ◽  
Error Rate ◽  
Error Probability ◽  
Storage Device ◽  
Solid State Drives ◽  
Solid State Drive ◽  
Bit Error Probability ◽  
The Real ◽  
Over Time

Solid-state drive (SSD) becomes popular as the main storage device. However, over time, the reliability of SSD degrades due to bit errors, which poses a serious issue. The periodic remapping (PR) has been suggested to overcome the issue, but it still has a critical weakness as PR increases lifetime loss. Therefore, we propose the conditional remapping invocation method (CRIM) to sustain reliability without lifetime loss. CRIM uses a probability-based threshold to determine the condition of invoking remapping operation. We evaluate the effectiveness of CRIM using the real workload trace data. In our experiments, we show that CRIM can extend a lifetime of SSD more than PR by up to 12.6% to 17.9% of 5-year warranty time. In addition, we show that CRIM can reduce the bit error probability of SSD by up to 73 times in terms of typical bit error rate in comparison with PR.

scholarly journals Garbage Collection Algorithms in Flash-Based Solid State Drives

2020 ◽  
Vol 9 (12) ◽  
pp. 29-33
Keyword(s):  
Solid State ◽  
Flash Memory ◽  
Garbage Collection ◽  
Hard Disk Drives ◽  
Window Size ◽  
Disk Drives ◽  
Solid State Drives ◽  
Storage Media ◽  
Write Amplification ◽  
Data Separation

Solid state drives (SSDs)have emerged as faster and more reliable data storages over the last few years. Their intrinsic characteristics prove them to be more efficient as compared to other traditional storage media such as the Hard Disk Drives (HDDs). Issues such as write amplification, however, degrade the performance and lifespan of an SSD. This issue is in turn handled by the Garbage Collection (GC) algorithms that are put in place to supply free blocks for serving the writes being made to the flash-based SSDs and thus reduce the need of extra unnecessary writes. The LRU/FIFO, Greedy, Windowed Greedy and D choices algorithms have been described to lower write amplification for incoming writes which are different in nature. The performance of the GC algorithms varies based on factors such as pre-defined hot/cold data separation, hotness of data, uniform/non-uniform nature of incoming writes, the GC window size and the number of pages in each block of the flash memory package. Finally, it can be seen that the number of write frontiers so used, can dictate the separation of hot/cold data and increase the performance of a GC algorithm.

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