Weak convergence theorems for symmetric generalized hybrid mappings and equilibrium problems

<p style='text-indent:20px;'>In this paper, we introduce three new iterative methods for finding a common point of the set of fixed points of a symmetric generalized hybrid mapping and the set of solutions of an equilibrium problem in a real Hilbert space. Each method can be considered as an combination of Ishikawa's process with the proximal point algorithm, the extragradient algorithm with or without linesearch. Under certain conditions on parameters, the iteration sequences generated by the proposed methods are proved to be weakly convergent to a solution of the problem. These results extend the previous results given in the literature. A numerical example is also provided to illustrate the proposed algorithms.</p>

Domain-specific Hybrid Mapping for Energy-efficient Baseband Processing in Wireless Networks

Advancing telecommunication standards continuously push for larger bandwidths, lower latencies, and faster data rates. The receiver baseband unit not only has to deal with a huge number of users expecting connectivity but also with a high workload heterogeneity. As a consequence of the required flexibility, baseband processing has seen a trend towards software implementations in cloud Radio Access Networks (cRANs). The flexibility gained from software implementation comes at the price of impoverished energy efficiency. This paper addresses the trade-off between flexibility and efficiency by proposing a domain-specific hybrid mapping algorithm. Hybrid mapping is an established approach from the model-based design of embedded systems that allows us to retain flexibility while targeting heterogeneous hardware. Depending on the current workload, the runtime system selects the most energy-efficient mapping configuration without violating timing constraints. We leverage the structure of baseband processing, and refine the scheduling methodology, to enable efficient mapping of 100s of tasks at the millisecond granularity, improving upon state-of-the-art hybrid approaches. We validate our approach on an Odroid XU4 and virtual platforms with application-specific accelerators on an open-source prototype. On different LTE workloads, our hybrid approach shows significant improvements both at design time and at runtime. At design-time, mappings of similar quality to those obtained by state-of-the-art methods are generated around four orders of magnitude faster. At runtime, multi-application schedules are computed 37.7% faster than the state-of-the-art without compromising on the quality.

A Crash Recovery Scheme for a Hybrid Mapping FTL in NAND Flash Storage Devices

An FTL (flash translation layer), which most flash storage devices are equipped with, needs to guarantee the consistency of modified metadata from a sudden power failure. This crash recovery scheme significantly affects the writing performance of a flash storage device during its normal operation, as well as its reliability and recovery performance; therefore, it is desirable to make the crash recovery scheme efficient. Despite the practical importance of a crash recovery scheme in an FTL, few works exist that deal with the crash recovery issue in FTL in a comprehensive manner. This study proposed a novel crash recovery scheme called FastCheck for a hybrid mapping FTL called Fully Associative Sector Translation (FAST). FastCheck can efficiently secure the newly generated address-mapping information using periodic checkpoints, and at the same time, leverages the characteristics of an FAST FTL, where the log blocks in a log area are used in a round-robin way. Thus, it provides two major advantages over the existing FTL recovery schemes: one is having a low logging overhead during normal operations in the FTL and the other to have a fast recovery time in an environment where the log provisioning rate is relatively high, e.g., over 20%, and the flash memory capacity is very large, e.g., 32 GB or 64 GB.

DSFTL: An Efficient FTL for Flash Memory Based Storage Systems

Flash memory is widely used in solid state drives (SSD), smartphones and so on because of their non-volatility, low power consumption, rapid access speed, and resistance to shocks. Due to the hardware features of flash memory that differ from hard disk drives (HDD), a software called FTL (Flash Translation Layer) was presented. The function of FTL is to make flash memory device appear as a block device to its host. However, due to the erase before write features of flash memory, flash blocks need to be constantly availed through the garbage collection (GC) of invalid pages, which incurs high-priced overhead. In the previous hybrid mapping schemes, there are three problems that cause GC overhead. First, operation of partial merge causes more page copies than operation of switch merge. However, many authors just concentrate on reducing operation of full merge. Second, the availability between a data block and a log block makes the space availability of the log block lower, and it also generates a very high-priced operation of full merge. Third, the space availability of the data block is low because the data block, which has many free pages, is merged. Therefore, we propose a new FTL named DSFTL (Dynamic Setting for FTL). In this FTL, we use many SW (sequential write) log blocks to increase operation of switch merge and to decrease operation of partial merge. In addition, DSFTL dynamically handles the data blocks and log blocks to reduce the operations of erase and the high-priced operation of full merge. Additionally, our scheme prevents the data block with many free pages from being merged to increase the space availability of the data block. Our extensive experimental results prove that our proposed approach (DSFTL) reduces the count of erase and increases the operation of switch merge. As a result, DSFTL decreases the garbage collection overhead.

A Hybrid Mapping Method with Position and Stiffness for Manipulator Teleoperation

Transferring versatile skills of human behavior to teleoperate manipulators to execute tasks with large uncertainties is challenging in robotics. This paper proposes a hybrid mapping method with position and stiffness for manipulator teleoperation through the exoskeleton device combining with the surface electromyography (sEMG) sensors. Firstly, according to the redefinition of robot workspace, the fixed scale mapping in free space and virtual impedance mapping in fine space are presented for position teleoperation. Secondly, the stiffness at the human arm endpoint is predicted and classified into three levels based on the K nearest neighbor (KNN) and XGBoost, and the stiffness mapping method is utilized to regulate the stiffness behavior of manipulator. Finally, the proposed method is demonstrated in three complementary experiments, namely the trajectory tracking in free space, the obstacle avoidance in fine space and the human robot interaction in contact space, which illustrate the effectiveness of the method.

Genetic dissection of yield-related traits and mid-parent heterosis for those traits in maize (Zea mays L.)

Background Utilization of heterosis in maize could be critical in maize breeding for boosting grain yield. However, the genetic architecture of heterosis is not fully understood. To dissect the genetic basis of yield-related traits and heterosis in maize, 301 recombinant inbred lines derived from 08 to 641 × YE478 and 298 hybrids from the immortalized F2 (IF2) population were used to map quantitative trait loci (QTLs) for nine yield-related traits and mid-parent heterosis. Results We observed 156 QTLs, 28 pairs of loci with epistatic interaction, and 10 significant QTL × environment interactions in the inbred and hybrid mapping populations. The high heterosis in F1 and IF2 populations for kernel weight per ear (KWPE), ear weight per ear (EWPE), and kernel number per row (KNPR) matched the high percentages of QTLs (over 50%) for those traits exhibiting overdominance, whereas a notable predominance of loci with dominance effects (more than 70%) was observed for traits that show low heterosis such as cob weight per ear (CWPE), rate of kernel production (RKP), ear length (EL), ear diameter (ED), cob diameter, and row number (RN). The environmentally stable QTL qRKP3–2 was identified across two mapping populations, while qKWPE9, affecting the trait mean and the mid-parent heterosis (MPH) level, explained over 18% of phenotypic variations. Nine QTLs, qEWPE9–1, qEWPE10–1, qCWPE6, qEL8, qED2–2, qRN10–1, qKWPE9, qKWPE10–1, and qRKP4–3, accounted for over 10% of phenotypic variation. In addition, QTL mapping identified 95 QTLs that were gathered together and integrated into 33 QTL clusters on 10 chromosomes. Conclusions The results revealed that (1) the inheritance of yield-related traits and MPH in the heterotic pattern improved Reid (PA) × Tem-tropic I (PB) is trait-dependent; (2) a large proportion of loci showed dominance effects, whereas overdominance also contributed to MPH for KNPR, EWPE, and KWPE; (3) marker-assisted selection for markers at genomic regions 1.09–1.11, 2.04, 3.08–3.09, and 10.04–10.05 contributed to hybrid performance per se and heterosis and were repeatedly reported in previous studies using different heterotic patterns is recommended.