The Research and Design of Image Processing System Based on FPGA and DSP

2014 ◽  
Vol 886 ◽  
pp. 556-559 ◽  
Author(s):  
Su Hua Chen ◽  
Zhi Meng Shu ◽  
Xu Fang
Keyword(s):  
Image Processing ◽  
Embedded System ◽  
Digital Signal Processor ◽  
High Speed ◽  
High Performance ◽  
Processing System ◽  
Image Data ◽  
Digital Signal ◽  
System A ◽  
High Efficient

In order to improve high performance and low power of image processing embedded system, A high-efficient image processing embedded system which is based on the field programmable gate array and high-speed digital signal processor in this paper. In the whole system, A novel data transmission structure with a dual-port RAM which is divided into two halves, is applied to buff the high-speed real-time image data by Ping-pong technique. Because all work in the system is divided between the FPGA and DSP in the form of the pipelined, it is 25% higher than the processing system based on the single DSP in performance.

scholarly journals Optimizing Convolution Neural Network on the TI C6678 multicore DSP

2018 ◽  
Vol 246 ◽  
pp. 03044 ◽  
Author(s):  
Guozhao Zeng ◽  
Xiao Hu ◽  
Yueyue Chen
Keyword(s):  
Neural Network ◽  
Neural Networks ◽  
Image Processing ◽  
Deep Learning ◽  
Digital Signal Processor ◽  
High Performance ◽  
Digital Signal ◽  
Automatic Translation ◽  
Convolution Operation ◽  
Multicore Dsp

Convolutional Neural Networks (CNNs) have become the most advanced algorithms for deep learning. They are widely used in image processing, object detection and automatic translation. As the demand for CNNs continues to increase, the platforms on which they are deployed continue to expand. As an excellent low-power, high-performance, embedded solution, Digital Signal Processor (DSP) is used frequently in many key areas. This paper attempts to deploy the CNN to Texas Instruments (TI)’s TMS320C6678 multi-core DSP and optimize the main operations (convolution) to accommodate the DSP structure. The efficiency of the improved convolution operation has increased by tens of times.

scholarly journals Development of a High-Speed Digitizer to Time Resolve Nanosecond Fluorescence Pulses

2012 ◽  
Vol 10 (2) ◽  
Author(s):  
E. Moreno-García ◽  
R. Galicia-Mejía ◽  
D. Jiménez-Olarte ◽  
J. M. de la Rosa Vázquez ◽  
S. Stolik-Isakina
Keyword(s):  
Time Domain ◽  
Digital Signal Processor ◽  
High Speed ◽  
High Performance ◽  
Input Pulse ◽  
Control Program ◽  
Sampling Technique ◽  
Digital Signal ◽  
Time Resolved ◽  
The Time Domain

The development of a high-speed digitizer system to measure time-domain voltage pulses in nanoseconds range is presented in this work. The digitizer design includes a high performance digital signal processor, a high-bandwidth analog-to-digital converter of flash-type, a set of delay lines, and a computer to achieve the time-domain measurements. A program running on the processor applies a time-equivalent sampling technique to acquire the input pulse. The processor communicates with the computer via a serial port RS-232 to receive commands and to transmit data. A control program written in LabVIEW 7.1 starts an acquisition routine in the processor. The program reads data from processor point by point in each occurrence of the signal, and plots each point to recover the time-resolved input pulse after n occurrences. The developed prototype is applied to measure fluorescence pulses from a homemade spectrometer. For this application, the LabVIEW program was improved to control the spectrometer, and to register and plot time-resolved fluorescence pulses produced by a substance. The developed digitizer has 750 MHz of analog input bandwidth, and it is able to resolve 2 ns rise-time pulses with 150 ps of resolution and a temporal error of 2.6 percent.

An Approach to Motion Control Applications Based on Advanced Programmable Devices

2012 ◽  
Vol 49 (3) ◽  
pp. 243-259 ◽  
Author(s):  
Juvenal Rodríguez-Reséndiz ◽  
Fortino Mendoza-Mondragón ◽  
Roberto A. Gómez-Loenzo ◽  
M. Agustín Martínez-Hernández ◽  
Victor H. Mucino
Keyword(s):  
Motion Control ◽  
Digital Signal Processor ◽  
High Speed ◽  
High Performance ◽  
Engineering Students ◽  
Low Cost ◽  
Digital Signal ◽  
Hybrid Architecture ◽  
Servo Drive ◽  
Control Applications

In this article a methodology for constructing a simple servo loop for motion control applications which is suitable for educational applications is presented. The entire hardware implementation is demonstrated, focusing on a microcontroller-based (μC) servo amplifier and a field programmable gate array-digital signal processor (FPGA-DSP) motion controller. A novel hybrid architecture-based digital stage is featured providing a low-cost servo drive and a high performance controller, which can be used as a basis for an industrial application. Communication between the computer and the controller is exploited in this project in order to perform a simultaneous adaptive servo tuning. The USB protocol has been put into operation in the user front-end because a high speed sampling frequency is required for the PC to acquire position feedback signals. A software interface is developed using educational software, enabling features not only limited to a motion profile but also the supervisory control and data acquisition (SCADA) topology of the system. A classical proportional-integral-derivative controller (PID) is programmed on a DSP in order to ensure a proper tracking of the reference at both low and high speeds in a d.c. motor. Furthermore, certain blocks are embedded on an FPGA. As a result, three of the most important technologies in signal processing are featured, permitting engineering students to understand several concepts covered in theoretical courses.

Novel Discrete Components Based Speed Controller for Induction Motor

2016 ◽  
Vol 7 (4) ◽  
pp. 1075
Author(s):  
Hussain Attia ◽  
Ali Sagafinia
Keyword(s):  
Induction Motor ◽  
Digital Signal Processor ◽  
High Speed ◽  
High Performance ◽  
Low Cost ◽  
Digital Signal ◽  
Speed Control ◽  
Electronic System ◽  
Voltage Controlled Oscillator ◽  
Electronic Design

This paper presents an electronic design based on general purpose discrete components for speed control of a single phase induction motor drive. The MOSFETs inverter switching is controlled using Sampled Sinusoidal Pulse Width Modulation (SPWM) techniques with V/F method based on Voltage Controlled Oscillator (VCO). The load power is also controlled by a novel design to produce a suitable SPWM pulse. The proposed electronic system has ability to control the output frequency with flexible setting of lower limit to less than 1 Hz and to higher frequency limits to 55 Hz. Moreover, the proposed controller able to control the value of load voltage to frequency ratio, which plays a major parameter in the function of IM speed control. Furthermore, the designed system is characterized by easy manufacturing and maintenance, high speed response, low cost, and does not need to program steps as compared to other systems based on Microcontroller and digital signal processor (DSP) units. The complete proposed electronic design is made by the software of NI Multisim version 11.0 and all the internal sub-designs are shown in this paper. Simulation results show the effectiveness of electronic design for a promising of a high performance IM PWM drive.

The Weld Image Acquisition and Preprocessing Based on FPGA

2013 ◽  
Vol 401-403 ◽  
pp. 1507-1513 ◽  
Author(s):  
Zhong Hu Yuan ◽  
Wen Tao Liu ◽  
Xiao Wei Han
Keyword(s):  
Image Processing ◽  
Real Time ◽  
High Speed ◽  
High Performance ◽  
Image Acquisition ◽  
Processing System ◽  
Large Data ◽  
Seam Tracking ◽  
Image Processing System ◽  
Time Requirements

In the weld image acquisition system, real-time image processing has been a difficult design bottleneck to break through, especially for the occasion of large data processing capability and more demanding real-time requirements, in which the traditional MCU can not adapt, so using high-performance FPGA as the core of the high speed image acquisition and processing card, better meets the large amount of data in most of the image processing system and high demanding real-time requirements. At the same time, system data collection, storage and display were implemented by using Verilog, and in order to reducing the influence of edge detection noise, the combination of image enhancement and median filtering image preprocessing algorithm was used. Compared to the pre-processing algorithm of the software implementation, it has a great speed advantage, and simplifies the subsequent processing work load, improves the speed and efficiency of the entire image processing system greatly. So it proves that the system has strong ability of restraining the noise of image, and more accurate extracted edge positioning, it can be applied in the seam tracking field which need higher real-time requirements.

Research of Embedded Image Processing Based on ARM11 and SQLite

2013 ◽  
Vol 373-375 ◽  
pp. 1603-1606
Author(s):  
Chen Chen Liu
Keyword(s):  
Image Processing ◽  
Embedded Systems ◽  
Embedded System ◽  
Research Program ◽  
Processing System ◽  
Image Data ◽  
Store Image ◽  
Efficient Management ◽  
The Embedded System ◽  
Embedded Image

According to the fact that the embedded system is not efficient enough to access and manipulate image data, this paper put forward a research program of image JPEG compression algorithm and being stored in a combination based on the ARM11 and SQLite embedded database image processing system. Comparative Researches on the system without data prove that the program can make the embedded systems more reasonable to store image data and realize the localized efficient management of the image data, which has certain practical value.

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