Research of Embedded Image Processing Based on ARM11 and SQLite

2013 ◽  
Vol 373-375 ◽  
pp. 1603-1606
Author(s):  
Chen Chen Liu
Keyword(s):  
Image Processing ◽  
Embedded Systems ◽  
Embedded System ◽  
Research Program ◽  
Processing System ◽  
Image Data ◽  
Store Image ◽  
Efficient Management ◽  
The Embedded System ◽  
Embedded Image

According to the fact that the embedded system is not efficient enough to access and manipulate image data, this paper put forward a research program of image JPEG compression algorithm and being stored in a combination based on the ARM11 and SQLite embedded database image processing system. Comparative Researches on the system without data prove that the program can make the embedded systems more reasonable to store image data and realize the localized efficient management of the image data, which has certain practical value.

Study on the Technology of Digital Image Processing

2014 ◽  
Vol 687-691 ◽  
pp. 3555-3558
Author(s):  
Wen Hui Li
Keyword(s):  
Image Processing ◽  
Embedded System ◽  
Processing System ◽  
Image Capture ◽  
Arm Processor ◽  
Device Architecture ◽  
Display Memory ◽  
Basic Functions ◽  
The Embedded System ◽  
Embedded Image

The paper aims to study a design and technique of the image processing based on the architecture of embedded system. Aimed at the own characteristic of embedded system, designing a platform been endowed with more operating functions of embedded image processing with versatility. The author adopts the method of the embedded system design based on the basic functions and characteristic of image processing system, summarizing and comparing of the characteristic and new developments of the EOS for the ARM processor, and finally chooses the embedded Linux for the operating system of our platform, also transplant it in the hardware platform. Aimed at the characteristic of Linux device architecture, the author introduces how to develop the image capture and display, memory the data of an image, the programming method of that. Some base arithmetic of image processing, such as image smooth, sharpen, edge detect and so on, and the graphics user interface are developed on the platform with using the Mini GUI, according to the intercommunion between the human and the platform. At last, some key program's code is given.

A Novel Embedded System Architecture for Fire Detection Based on Image Processing

2014 ◽  
Vol 608-609 ◽  
pp. 454-458
Author(s):  
Wei Bai ◽  
Chen Yuan Hu
Keyword(s):  
Image Processing ◽  
Embedded System ◽  
System Architecture ◽  
Cooperative Control ◽  
Processing System ◽  
Fire Detection ◽  
System Level ◽  
High Definition ◽  
The Embedded System ◽  
Pass Through

This paper presents novel logic/software co-work architecture for embedded high definition image processing platform, which is built by the considerations of system level, board hardware level, and the tasks partition between CPU processing and programmable logic based on the latest launched System on Chip Field Programmable Gate Array (Soc FPGA) – Xilinx ZC7020. For this case, we comprehensive analyze of the critical data paths: the uniform Advanced Extensible Interface (AXI) processing between processing system (PS) and processing logic (PL), including high definition video pass through PL to PS and PS software processing send to PL for speed up. We have included the transplant of opensource Linux, multiprocessing cooperative control and boot loader in PS side. Since the general platform is proposed, a fire detection approach based on high definition image processing is implemented. Experiment results indicated the feasibility and universality of the embedded system architecture.

The Research and Design of Image Processing System Based on FPGA and DSP

2014 ◽  
Vol 886 ◽  
pp. 556-559 ◽  
Author(s):  
Su Hua Chen ◽  
Zhi Meng Shu ◽  
Xu Fang
Keyword(s):  
Image Processing ◽  
Embedded System ◽  
Digital Signal Processor ◽  
High Speed ◽  
High Performance ◽  
Processing System ◽  
Image Data ◽  
Digital Signal ◽  
System A ◽  
High Efficient

In order to improve high performance and low power of image processing embedded system, A high-efficient image processing embedded system which is based on the field programmable gate array and high-speed digital signal processor in this paper. In the whole system, A novel data transmission structure with a dual-port RAM which is divided into two halves, is applied to buff the high-speed real-time image data by Ping-pong technique. Because all work in the system is divided between the FPGA and DSP in the form of the pipelined, it is 25% higher than the processing system based on the single DSP in performance.

scholarly journals The Design of a 2D Graphics Accelerator for Embedded Systems

Electronics ◽  
2021 ◽  
Vol 10 (4) ◽  
pp. 469
Author(s):  
Hyun Woo Oh ◽  
Ji Kwang Kim ◽  
Gwan Beom Hwang ◽  
Seung Eun Lee
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Real Time ◽  
Line Drawing ◽  
Cmos Process ◽  
Embedded Processor ◽  
Processor Core ◽  
Field Programmable ◽  
The Embedded System ◽  
Graphics Processing

Recently, advances in technology have enabled embedded systems to be adopted for a variety of applications. Some of these applications require real-time 2D graphics processing running on limited design specifications such as low power consumption and a small area. In order to satisfy such conditions, including a specific 2D graphics accelerator in the embedded system is an effective method. This method reduces the workload of the processor in the embedded system by exploiting the accelerator. The accelerator assists the system to perform 2D graphics processing in real-time. Therefore, a variety of applications that require 2D graphics processing can be implemented with an embedded processor. In this paper, we present a 2D graphics accelerator for tiny embedded systems. The accelerator includes an optimized line-drawing operation based on Bresenham’s algorithm. The optimized operation enables the accelerator to deal with various kinds of 2D graphics processing and to perform the line-drawing instead of the system processor. Moreover, the accelerator also distributes the workload of the processor core by removing the need for the core to access the frame buffer memory. We measure the performance of the accelerator by implementing the processor, including the accelerator, on a field-programmable gate array (FPGA), and ascertaining the possibility of realization by synthesizing using the 180 nm CMOS process.

scholarly journals Design and implementation of remote image processing system for space launch site

2021 ◽  
Vol 233 ◽  
pp. 04026
Author(s):  
Ma Li ◽  
Wang Bai Yan ◽  
Liu Tao ◽  
WangYu Chao ◽  
Xiang Yu ◽  
...  
Keyword(s):  
Image Processing ◽  
Auxiliary Information ◽  
Processing System ◽  
Image Data ◽  
Image Transmission ◽  
Engineering Practice ◽  
Image Processing System ◽  
Rocket Flight ◽  
Launch Site ◽  
Space Launch

Telemetry image has the characteristics of intuitive image in the process of rocket flight. Through real-time acquisition of rocket flight video image, it can provide the working status of key nodes in the process of rocket flight, and provide intuitive decision-marking auxiliary information for commanders. This paper analyzes the design content of the image processing system of the space launch site from the aspects of image transmission mechanism, information flow, image data processing and image decoding, so as to provide technical basis for the image receiving, transmission and decoding process in the engineering practice of the image processing system.

UML as Front-End Language for Embedded Systems Design

2010 ◽  
pp. 1-23
Author(s):  
Lisane Brisolara de Brisolara ◽  
Marcio Eduardo Kreutz ◽  
Luigi Carro
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Systems Design ◽  
Design Flow ◽  
Domain Specific ◽  
History Of ◽  
Uml Diagrams ◽  
The Embedded System ◽  
Definition Of

This chapter covers the use of UML as a modeling language for embedded systems design. It introduces the UML language, presenting the history of its definition, its main diagrams and characteristics. Using a case study, we show that using the standard UML with its limitations one is not able to model many important characteristics of embedded systems. For that reason, UML provides extension mechanisms that enable one to extend the language for a given domain, through the definition of profiles covering domain-specific applications. Several profiles have been proposed for the embedded systems domain, and some of those that have been standardized by OMG are presented here. A case study is also used to present MARTE, a new profile specifically proposed for the embedded system domain, enabling designers to model aspects like performance and schedulability. This chapter also presents a discussion about the effort to generate code from UML diagrams and analyses the open issues to the successful use of UML in the whole embedded system design flow.

Design and Realization of Double-Buses Modularized Structure Image Processing System

2011 ◽  
Vol 179-180 ◽  
pp. 257-263
Author(s):  
Biao Zhang ◽  
Yue Huan Wang
Keyword(s):  
Image Processing ◽  
Real Time ◽  
Processing System ◽  
Image Data ◽  
Parallel Structure ◽  
Image Processing System ◽  
Real Time Image Processing ◽  
Real Time Image ◽  
Data Bus ◽  
Time Image

It is double-buses modularized structure with the combination of system control bus and high speed image data bus which is put forward in this paper. Moreover, the management and distribution of image data bus and the design of system reset procedure are elaborated through which a kind of practical real-time image processing system with the strongest adaptability and capability for structure programming and system expansion. The computing capability in infrared test of small target is greatly improved which is verified in tri DSP model system. According to complex image processing task, through the adjustment of parallel structure of image processing algorithm, the higher parallel efficiency can be realized. So to say, the system structure has a great adjustment to algorithm parallel structure and can be successfully used as a platform for universal real-time image processing.

Implementation of the Fast Median Filtering Algorithm Based on FPGA

2014 ◽  
Vol 513-517 ◽  
pp. 1055-1058
Author(s):  
Jin Lun Li ◽  
Shao Hui Cui ◽  
Ku Nao Guo
Keyword(s):  
Image Processing ◽  
Real Time ◽  
Processing System ◽  
Difficult Problem ◽  
Median Filtering ◽  
Filtering Algorithm ◽  
Functional Simulation ◽  
Real Time Image ◽  
Embedded Image ◽  
Time Image

Real-time image processing has been a difficult problem in embedded image processing system. The traditional MCU could not meet the real-time demand when large volume of data awaited to be proceed. FPGA is an effective driver to achieve real-time parallel processing of data. The implementation rationale and the design of module have been given in this article; and the Hard Software has been truly achieved. At the end of the article, the simulation waveform graph has been obtained by processing functional simulation on algorithm module by using Modelsim software; and the simulation result shows that this design is able to proper functioning and has good application prospects.

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