Current Gain of 4H-SiC Bipolar Transistors Including the Effect of Interface States

2005 ◽  
Vol 483-485 ◽  
pp. 889-892 ◽  
Author(s):  
Martin Domeij ◽  
Erik Danielsson ◽  
Hyung Seok Lee ◽  
Carl Mikael Zetterling ◽  
Mikael Östling
Keyword(s):  
Side Wall ◽  
Interface States ◽  
Bipolar Transistors ◽  
Current Gain ◽  
Poor Agreement ◽  
Collector Current ◽  
Bandgap Narrowing ◽  
Pulsed Measurements ◽  
Emitter Junction ◽  
Constant Distribution

The current gain (b) of 4H-SiC BJTs as function of collector current (IC) has been investigated by DC and pulsed measurements and by device simulations. A measured monotonic increase of b with IC agrees well with simulations using a constant distribution of interface states at the 4H-SiC/SiO2 interface along the etched side-wall of the base-emitter junction. Simulations using only bulk recombination, on the other hand, are in poor agreement with the measurements. The interface states degrade the simulated current gain by combined effects of localized recombination and trapped charge that influence the surface potential. Additionally, bandgap narrowing has a significant impact by reducing the peak current gain by about 50 % in simulations.

Vertical Bipolar Transistors and a Merged 3–D Vertical Bipolar—Mos Device in Recrystallized Polysilicon

1985 ◽  
Vol 53 ◽  
Author(s):  
J.C. Sturm ◽  
J.F. Gibbons
Keyword(s):  
Minority Carrier ◽  
Strong Dependence ◽  
Three Dimensional ◽  
Bipolar Transistors ◽  
Bipolar Transistor ◽  
Current Gain ◽  
Collector Current ◽  
Beam Laser ◽  
P Type ◽  
Mos Device

ABSTRACTThe minority carrier properties of shaped—beam laser-recrystallized polysilicon films have been studied, leading to the successful fabrication of vertical bipolar transistors in these films and to the demonstration of a novel three—dimensional mergedvertical bipolar—MOS device. Experiments with lateral transistors established a minority carrier diffusion length of 4 μm in p—type recrystallized films. Vertical bipolar npn transistors with a base—width of 0.2 μm were fabricated in 0.75–μm—thick films using a polysilicon emitter technology. The strong dependence of the gain of the transistors on hydrogen annealing steps is described. With an Ar:H plasma anneal to decrease base—emitter space—charge region recombination, a common—emitter current gain of 100 was possible. The bipolar transistor technology was then used to develop a 3—D fourterminal merged verticalbipolar—MOS device in a recrystallized film. It consists of the three terminals of a bipolar transistor plus a fourth underlying terminal which serves to switch the collector current on or off. A simple model for the device is presented.

Current Gain of 4H-SiC Bipolar Transistors Including the Effect of Interface States

2005 ◽  
pp. 889-892
Author(s):  
Martin Domeij ◽  
Erik Danielsson ◽  
Hyung Seok Lee ◽  
C.M. Zetterling ◽  
Mikael Östling
Keyword(s):  
Interface States ◽  
Bipolar Transistors ◽  
Current Gain

The Role of the Si-SiO2 (CVD) Interface in Degradation Effects for High-Speed Bipolar Transistors

1995 ◽  
Vol 378 ◽  
Author(s):  
J.-Q. Lü ◽  
S. Schöttl ◽  
E. Stefanov ◽  
F. Koch ◽  
R. Mahnkopf ◽  
...  
Keyword(s):  
High Speed ◽  
Tunneling Current ◽  
Bipolar Transistors ◽  
Bipolar Transistor ◽  
Current Gain ◽  
Current Increase ◽  
Base Current ◽  
2D Simulation ◽  
Trap Assisted Tunneling ◽  
Emitter Junction

AbstractThe intent of the present work is to analyze device degradation and reliability in terms of their microscopic origins. The base-emitter junction of the advanced, “double-poly”, self-aligned bipolar transistor contacts the SiO2 sidewall spacer. During normal circuit operation, the base-emitter junction experiences a reverse bias which as a stress in time degrades the current gain of the transistor. Both a decrease of the gain, as well as an increase in the noise are observed. The forward base current increase as a function of stress time follows △IB ∼ tn. We present evidence that the defects are occurring at the Si-Si02 interface from perimeter to area comparisons. The weak temperature dependence of the forward base current in degraded transistors shows that trap-assisted tunneling current through the Si-SiO2 interface states is involved. The random-telegraph-signals observed for the first time in a silicon bipolar transistor are a direct identification of damage at the Si-SiO2 interface. 2D simulation of the potential and field near the interface allows us to show that damage can be expected.

Improved Current Gain in GaN/SiC Heterojunction Bipolar Transistors by Insertion of Ultra-Thin AlN Layer at Emitter-Junction

2009 ◽  
Vol 615-617 ◽  
pp. 979-982 ◽  
Author(s):  
Hiroki Miyake ◽  
Tsunenobu Kimoto ◽  
Jun Suda
Keyword(s):  
Heterojunction Bipolar Transistors ◽  
Bipolar Transistors ◽  
Current Gain ◽  
Carrier Injection ◽  
Voltage Measurement ◽  
Injection Efficiency ◽  
Conduction Band Offset ◽  
Current Voltage ◽  
Current Voltage Characteristics ◽  
Emitter Junction

GaN/SiC Heterojunction Bipolar Transistors (HBTs) with ultra-thin AlN insertion layers at the n-GaN/p-SiC emitter junction are proposed to improve carrier injection efficiency. The current-voltage characteristics of n-GaN/AlN/p-SiC heterojunctions have exhibited very small reverse leakage and good rectification. The capacitance-voltage measurement have revealed that the conduction band offset between n-GaN and p-SiC has been reduced from -0.74 eV to -0.54 eV by insertion of AlN, indicating that the GaN/AlN/SiC heterojunction may show better electron-injection efficiency. A significantly improved common-base current gain (α~0.2) is obtained for GaN/AlN/SiC HBTs with initial N* pre-irradiation, while it was very low (α~0.001) for GaN/SiC HBTs without AlN layers.

scholarly journals Effects of Temperature and Stress on the InGaP/GaAs Heterojunction Phototransistor

2021 ◽  
Vol 19 (6.2) ◽  
pp. 28
Author(s):  
Phuc Hong Than ◽  
Tran Thi Tra Vinh ◽  
Le Thi My Hanh ◽  
Than Quang Tho ◽  
Nguyen Vu Anh Quang ◽  
...  
Keyword(s):  
Heterojunction Bipolar Transistors ◽  
Stress Test ◽  
Optical Gain ◽  
Bipolar Transistors ◽  
Current Gain ◽  
Temperature Dependent ◽  
Collector Current ◽  
Electrical Stress ◽  
Before And After ◽  
Higher Temperature

Although the effects of electrical stress and temperature on the performance of the InGaP/GaAs heterojunction bipolar transistors (HBTs) have been widely studied and reported, little or none was reported for the InGaP/GaAs heterojunction phototransistors (HPTs) in the literature. In this paper, we discuss the temperature-dependent characteristic of InGaP/GaAs HPTs before and after electrical stress and assess the effectiveness of the emitter-ledge passivation, which was found to effectively keep the InGaP/GaAs HBTs from degrading at higher temperature or after an electrical stress. The emitter-ledge passivation is also effective keeping a higher optical gain even at higher temperature. An electrical stress was given to the HPTs by keeping the collector current at 60 mA for 15 min. Since the collector current density as an electrical stress is 24 A/cm2 and much smaller than the stress usually given to smaller HBTs for the stress test, the decreased optical gain was not observed when it was given at room temperature. However, when it was given at 420 K, significant decreases of the current gain and optical gain were observed at any temperature. Nevertheless, the emitter-ledge passivation was found effective in minimizing the decreases of the current gain and optical gain.

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