Uniform Poly-Si TFTs for AMOLEDs Using Field-Enhanced Rapid Thermal Annealing

2007 ◽  
Vol 124-126 ◽  
pp. 447-450 ◽  
Author(s):  
Hyoung June Kim
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Thin Film Transistors ◽  
Solid Phase ◽  
Radiative Heating ◽  
Solid Phase Crystallization ◽  
Glass Substrates ◽  
Grain Structures ◽  
Amorphous Si ◽  
Si Thin Film

Polycrystalline Si thin film transistors (TFTs) have been fabricated through solid phase crystallization using field-enhanced rapid thermal annealing (FE-RTA) system. The system consists of inline furnace modules for preheating and cooling of the glass substrates and a process module for rapid radiative heating combined with alternating magnetic field induction. The FE-RTA system enables crystallization of amorphous Si at high throughputs without any glass damages. While the typical grain structures of poly-Si by FE-RTA are similar to those of solid phase crystallization, the residual amorphous Si and intragranular defects are reduced.

Comparison Between Rapid Thermal and Furnace Annealing for A-Si Solid Phase Crystallization

1996 ◽  
Vol 424 ◽  
Author(s):  
Reece Kingi ◽  
Yaozu Wang ◽  
Stephen J. Fonash ◽  
Osama Awadelkarim ◽  
John Mehlhaff
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Annealing Temperature ◽  
Solid Phase ◽  
Growth Time ◽  
Crystallization Time ◽  
Solid Phase Crystallization ◽  
Furnace Annealing ◽  
Lower Growth ◽  
Transient Time

AbstractRapid thermal annealing and furnace annealing for the solid phase crystallization of amorphous silicon thin films deposited using PECVD from argon diluted silane have been compared. Results reveal that the crystallization time, the growth time, and the transient time are temperature activated, and that the resulting polycrystalline silicon grain size is inversely proportional to the annealing temperature, for both furnace annealing and rapid thermal annealing. In addition, rapid thermal annealing was found to result in a lower transient time, a lower growth time, a lower crystallization time, and smaller grain sizes than furnace annealing, for a given annealing temperature. Interestingly, the transient time, growth time, and crystallization time activation energies are much lower for rapid thermal annealing, compared to furnace annealing.We propose two models to explain the observed differences between rapid thermal annealing and furnace annealing.

Solid-phase crystallization and dopant activation of amorphous silicon films by pulsed rapid thermal annealing

1998 ◽  
Vol 135 (1-4) ◽  
pp. 205-208 ◽  
Author(s):  
Yongqian Wang ◽  
Xianbo Liao ◽  
Zhixun Ma ◽  
Guozhen Yue ◽  
Hongwei Diao ◽  
...  
Keyword(s):  
Amorphous Silicon ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Solid Phase ◽  
Silicon Films ◽  
Solid Phase Crystallization ◽  
Dopant Activation

Approaches to modifying solid phase crystallization kinetics for a-Si films

1996 ◽  
Vol 424 ◽  
Author(s):  
Reece Kingi ◽  
Yaozu Wang ◽  
Stephen Fonash ◽  
Osama Awadelkarim ◽  
Yuan-Mn Li
Keyword(s):  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Crystallization Kinetics ◽  
Solid Phase ◽  
Surface Treatments ◽  
Film Deposition ◽  
Crystallization Time ◽  
Solid Phase Crystallization ◽  
Furnace Annealing ◽  
Thermal Budget

AbstractThree approaches to modifying the solid phase crystallization kinetics of amorphous silicon thin films are examined with the goal of reducing the thermal budget and improving the poly-Si quality for thin film transistor applications. The three approaches consist of (1) variations in the PECVD a-Si deposition parameters; (2) the application of pre-fumace-anneal surface treatments; and (3) using both rapid thermal annealing and furnace annealing at different temperatures. We also examine the synergism among these approaches.Results reveal that (1) film deposition dilution and dilution/temperature changes do not strongly affect crystallization time, but do affect grain size; (2) pre-anneal surface treatments can dramatically reduce the solid phase crystallization thermal budget for diluted films and act synergistically with deposition dilution or dilution/temperature effects; and (3) rapid thermal annealing leads to different crystallization kinetics from that seen for furnace annealing.

Effects of high pressure annealing on the characteristics of solid phase crystallization poly-Si thin-film transistors

2008 ◽  
Vol 103 (4) ◽  
pp. 044508 ◽  
Author(s):  
Moojin Kim ◽  
Kyoung-Bo Kim ◽  
Ki-Yong Lee ◽  
CheolHo Yu ◽  
Hye-Dong Kim ◽  
...  
Keyword(s):  
Thin Film ◽  
High Pressure ◽  
Thin Film Transistors ◽  
Solid Phase ◽  
Solid Phase Crystallization ◽  
Si Thin Film

Heating Rate Effects in Rapid Thermal Annealing of Arsenic Implanted Silicon

1994 ◽  
Vol 342 ◽  
Author(s):  
J.P. de Souza ◽  
P.F.P. Fichtner ◽  
D.K. Sadana
Keyword(s):  
Heating Rate ◽  
Thermal Annealing ◽  
Rapid Thermal Annealing ◽  
Solid Phase ◽  
Furnace Annealing ◽  
Residual Defect ◽  
Projected Range ◽  
Rate Effects ◽  
Amorphous Si ◽  
Heavy Dose

ABSTRACTCross section TEM and channeling analysis show that the heating rate (HR) of a rapid thermal annealing (RTA) cycle affects the residual defect distribution in Si implanted with As+ to a heavy dose (≈ 1016 cm−2). Two defect bands are observed after solid phase epitaxial growth (SPEG): the first one centered at a depth corresponding to the projected range of the As (band I), and the second one located at depth corresponding to the original amorphous crystalline (a-c) interface (band II). The density of defects in band I is found to increase with the As dose, and with the annealing temperature (550 - 650°C, furnace annealing). However, for RTA (800 - 1000°C) both the density and depth distribution of these defects are dependent on HR. We propose that Si self-interstitials (SiI) are created at the a-c interface when As becomes substitutional during SPEG. The SPEG velocity determines whether the SiI are accommodated in the amorphous Si layer (low velocities) or are captured by the regrowing c-Si (high velocities)

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