scholarly journals Simulation of a new hybrid Si/SiC power device for harsh environment applications

2015 ◽  
Vol 2015 (HiTEN) ◽  
pp. 000190-000194
Author(s):  
P.M. Gammon ◽  
C.W. Chan ◽  
P.A. Mawby
Keyword(s):  
Thin Film ◽  
High Temperature ◽  
Silicon On Insulator ◽  
Power Device ◽  
Harsh Environment ◽  
Silicon Thin Film ◽  
Device Structure ◽  
Solar Inverter ◽  
Thermal Simulations ◽  
Soi Substrates

A new power device structure is proposed, conceived to operate in a high temperature, harsh environment, for example within a motor drive application down hole, as an inverter in the engine bay of an electric car, or as a solar inverter in space. The lateral silicon power device resembles a laterally diffused MOSFET (LDMOS), such as those implemented within silicon on insulator (SOI) substrates. However, unlike SOI, the Si thin film has been transferred directly onto a semi-insulating 6H silicon carbide (6H-SiC) substrate via a wafer bonding process. Thermal simulations of the hybrid Si/SiC substrate have shown that the high thermal conductivity of the SiC will have a junction-to-case temperature approximately 4 times less that an equivalent SOI device, reducing the effects of self-heating. Electrical simulations of a 600 V power device, implemented entirely with the silicon thin film, suggest that it will retain the ability of SOI to minimise leakage at high temperature, but does so with 50% less conduction losses.

Chemical speciation at buried interfaces in high-temperature processed polycrystalline silicon thin-film solar cells on ZnO:Al

2013 ◽  
Vol 113 (4) ◽  
pp. 044519 ◽  
Author(s):  
Christiane Becker ◽  
Marcel Pagels ◽  
Carolin Zachäus ◽  
Beatrix Pollakowski ◽  
Burkhard Beckhoff ◽  
...  
Keyword(s):  
Thin Film ◽  
Solar Cells ◽  
High Temperature ◽  
Polycrystalline Silicon ◽  
Chemical Speciation ◽  
Thin Film Solar Cells ◽  
Silicon Thin Film ◽  
Buried Interfaces

Layer Transfer of Hydrogen-Implanted Silicon Wafers by Thermal-Microwave Co-Activation

2006 ◽  
Vol 913 ◽  
Author(s):  
Y. Y. Yang ◽  
C. H. Huang ◽  
Y. -K. Hsu ◽  
S. -J. Jeng ◽  
C. -C. Tai ◽  
...  
Keyword(s):  
Thin Film ◽  
Low Temperature ◽  
Silicon On Insulator ◽  
Hydrogen Ions ◽  
Silicon Thin Film ◽  
Projected Range ◽  
Hydrogen Molecules ◽  
Bonded Interface ◽  
Hydrogen Implantation ◽  
Short Time

AbstractSilicon on insulator (SOI) substrate is a key materials for nano-scaling IC device and the requirement for its crystal structure and quality is really high. Nanothick silicon thin film can be transferred onto a handle wafer from a donation wafer to form a SOI wafer after this process including hydrogen implantation of donation wafer, wafer bonding, and thermal treatment at moderately high temperatures of 400 to 600 degree centigrade. The expansion of the hydrogen molecular evolving from the implanted hydrogen ions interacting with silicon dangling bonds and trapped inside the microcavities located near the ion projected range resulted in exfoliation of the silicon thin film in the final heating step. The hydrogen molecules inside the microcavities tend to expand along the bonded interface rather than radially to form individual blisters. Finally, the fracture failure of ion implanted area parallel to the bonded interface near the projected ion range is formed by the sideway expansion of the cavities due to the diffusion supply of implanted hydrogen excited by thermal energy. Microwave processing can lower the activity energy to speed the chemical reaction so that it leads the format of microcavities occurring at low temperature by directly exciting the implanted hydrogen ions by microwave energy and also results in decreasing the critical dosage for layer splitting. However, microwave irradiation alone at room temperature causes the formation of lots of nucleus sites of micro-voids filled by hydrogen molecule which is immobility in silicon resulting in the issue of uniformity of transferred layer. In this study, the hydrogen implanted silicon substrate was irradiated by microwave at low temperature (200 degree centigrade) rather than microwave alone to co-activate the implanted hydrogen ions in silicon to increase not only kinetic energy but also mobility to successfully achieve a completely transferred layer in a short time.

Conduction and low-frequency noise in high temperature processed polycrystalline silicon thin film transistors

1998 ◽  
Vol 83 (3) ◽  
pp. 1469-1475 ◽  
Author(s):  
C. A. Dimitriadis ◽  
J. Brini ◽  
G. Kamarinos ◽  
V. K. Gueorguiev ◽  
Tz. E. Ivanov
Keyword(s):  
Thin Film ◽  
High Temperature ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Low Frequency ◽  
Frequency Noise ◽  
Low Frequency Noise ◽  
Silicon Thin Film

Compositional dependent high temperature crystalline phase formation on manganese–silicon thin film combinatorial libraries in controlled oxidizing atmospheres

2016 ◽  
Vol 664 ◽  
pp. 351-362 ◽  
Author(s):  
Carina Hambrock ◽  
Wolfgang Burgstaller ◽  
Cezarina Cela Mardare ◽  
Andrei Ionut Mardare ◽  
Achim Walter Hassel
Keyword(s):  
Thin Film ◽  
High Temperature ◽  
Phase Formation ◽  
Crystalline Phase ◽  
Combinatorial Libraries ◽  
Silicon Thin Film

Fabrication and Characteristics of Micro Heaters Based on Polycrystalline 3C-SiC for High Temperature and Voltage

2010 ◽  
Vol 645-648 ◽  
pp. 1085-1088 ◽  
Author(s):  
Gwiy Sang Chung ◽  
Jae Min Jeong
Keyword(s):  
Thin Film ◽  
High Temperature ◽  
Energy Band ◽  
Lattice Mismatch ◽  
Harsh Environment ◽  
Thermal Coefficient ◽  
Energy Band Gap ◽  
Temperature Detector ◽  
Micro Electromechanical System ◽  
Thermal Coefficient Of Resistance

This paper describes fabrication and properties of polycrystalline 3C-SiC micro heaters built on AlN(0.1 μm)/3C-SiC(1.0 μm) suspended membranes using surface micromachining technology. 3C-SiC and AlN semiconductors which have a large energy band gap and very low lattice mismatch were used as sensors in harsh environment micro electromechanical system (MEMS) applications in this work. The 3C-SiC thin film was simultaneously used as a resistance of temperature detector (RTD) and micro heater for detecting heated temperature correctly. The thermal coefficient of resistance (TCR) of the implemented 3C-SiC RTD is about -5200 ppm/°C in the temperature range from 25°C to 50°C and -1040 ppm/°C at 500°C. The 3C-SiC micro heater generates about 500°C of heat at 10.3 mW. Moreover, 3C-SiC micro heaters stand at higher applied voltages than case of Pt micro heaters.

A Novel Device Structure for High Voltage, High Performance Amorphous Silicon Thin-Film Transistors

1996 ◽  
Vol 424 ◽  
Author(s):  
A. M. Miri ◽  
P. S. Gudem ◽  
S. G. Chamberlain ◽  
A. Nathan
Keyword(s):  
Thin Film ◽  
High Voltage ◽  
Thin Film Transistors ◽  
High Performance ◽  
Low Voltage ◽  
Silicon Thin Film ◽  
Device Structure ◽  
Linear Region ◽  
Output Characteristics ◽  
Voltage Breakdown

AbstractConventional high voltage thin-film transistors (HVTFTs) suffer from performance limitations such as low on-current, Vx, shift and large curvature in the linear region of the output characteristics. These limitations are associated with the highly resistive dead region in conventional HVTFT structures. In this paper, we present a novel TFT structure which has a high on-current, improved output characteristics in the linear region, and no Vx shift. The higher on-current and significant improvement in output characteristics allows faster switching. Elimination of the Vx shift leads to more reliable circuit operation. The new structure is based on the conventional low voltage TFT (LVTFT) structure except that it does not suffer from low-voltage breakdown. The low-voltage breakdown of the gate nitride in conventional LVTFTs is perceived to be due to spiking of the drain metallization into the underlying layers which creates regions of very high electric field. In our novel structure, a higher breakdown is achieved by locating the metal contacts away from the gate edge while keeping the necessary drain to gate overlap through a heavily doped microcrystalline layer. Therefore, the new TFT extends the same performance as LVTFTs to high voltage operation. Furthermore, this structure also enhances the yield and reliability by minimizing the common faults in TFTs such as short circuits between gate, source and drain.

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