Designs of Low-Power High-Speed Array Multiplier Based on MOS Current Mode Logic

2012 ◽  
Vol 6 (23) ◽  
pp. 448-456
Author(s):  
Zhenli Li ◽  
Jianping Hu
Keyword(s):  
Low Power ◽  
High Speed ◽  
Current Mode ◽  
Current Mode Logic ◽  
Array Multiplier

scholarly journals Realization of Various Topologies of Adders Based on H-Dycml

2020 ◽  
Vol 9 (4) ◽  
pp. 1865-1891
Keyword(s):  
Low Power ◽  
Power Dissipation ◽  
High Speed ◽  
Current Mode ◽  
Cmos Technology ◽  
Performance Parameters ◽  
Current Mode Logic ◽  
Look Ahead ◽  
Overall Performance ◽  
Power Delay Product

Power consumption minimization in a circuit becomes imperative with growth in demands of portable goods. However, at the same time, its speed limits the performance of a system. Therefore, there is a need of choosing optimum circuit architecture that takes into account the both conflicting parameters, that is, power dissipation and speed. Arithmetic unit is one of the vital components of portable goods and out of all arithmetic operations, adders are the most commonly used. To address the issue of high power dissipation, low-power designing styles are becoming prominent now-a-days. Hybrid Dynamic Current Mode Logic is high-speed, low-power designing style that has been recently proposed in literature. Therefore, this paper presents the comparison between performances of various topologies of adders that are implemented using a high-speed, low-power designing style: Hybrid-Dynamic Current Mode Logic (H-DyCML). All the circuits are realized in Cadence Virtuoso using 180nm CMOS technology parameter. Various performance parameters are evaluated such as: Delay, Power, Power-Delay Product, and hardware utilization. It is found that carry look-ahead adder out-stands other adders in terms of overall performance.

MOS CURRENT MODE LOGIC CIRCUITS: DESIGN CONSIDERATION IN HIGH-SPEED LOW-POWER APPLICATIONS AND ITS FUTURE TREND, A TUTORIAL

2005 ◽  
Vol 15 (03) ◽  
pp. 599-614 ◽  
Author(s):  
YUYU LIU ◽  
JINGUO QUAN ◽  
HUAZHONG YANG ◽  
HUI WANG
Keyword(s):  
Low Power ◽  
High Speed ◽  
Supply Voltage ◽  
Dynamic Logic ◽  
Current Mode ◽  
Digital Circuit ◽  
Future Trend ◽  
Low Noise ◽  
Mixed Signal ◽  
Current Mode Logic

In this paper, a logic style that is becoming increasingly popular is presented, which is called MOS Current Mode Logic (MCML). MCML is a novel and useful logic style for high-speed, low-power and mixed-signal applications. Its high-speed switching, low supply voltage and reduced output voltage swing contribute to its high performance, low power dissipation, and low noise features. MCML circuits are compared to several other logic styles, such as conventional static CMOS, dynamic logic, and traditional emitter coupled logic (ECL) in terms of power, delay and common mode noise immunity. MCML circuits seem to be very promising in high-speed, low-power and mixed-signal digital circuit applications, such as portable electronic devices, gigahertz microprocessors, and optical transceivers.

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