Low-power high-speed performance of current-mode logic D flip-flop topology using negative-differential-resistance devices

2008 ◽  
Vol 2 (2) ◽  
pp. 281 ◽  
Author(s):  
T. Kim ◽  
Y. Jeong ◽  
K. Yang
Keyword(s):  
Low Power ◽  
Negative Differential Resistance ◽  
High Speed ◽  
Current Mode ◽  
Differential Resistance ◽  
Flip Flop ◽  
Current Mode Logic ◽  
Speed Performance

High-Performance Current-Mode Logic Ternary D Flip-Flop Based on Bipolar Complementary Metal Oxide Semiconductor

2021 ◽  
Vol 16 (4) ◽  
pp. 528-533
Author(s):  
Xianghong Zhao ◽  
Longhua Ma ◽  
Hongye Su ◽  
Jieyu Zhao ◽  
Weiming Cai
Keyword(s):  
High Frequency ◽  
High Speed ◽  
High Performance ◽  
Complementary Metal Oxide Semiconductor ◽  
Current Mode ◽  
Oxide Semiconductor ◽  
Logic Function ◽  
Flip Flop ◽  
Current Mode Logic ◽  
Transmission Speed

In this paper, a simple-structured and high-performance current-mode logic (CML) ternary D flip-flop based on BiCMOS is proposed. It combines both advantages of BiCMOS and CML circuits, which is with much more high-speed, strong-drive and anti-interference abilities. Utilizing TSMC 180 nm process, results of simulations carried out by HSPICE illustrate the proposed circuit not only has correct logic function, but also gains improvements of 95.6~98.4% in average D-Q delay and 16.2%~70.4 in PDP compared with advanced ternary D flip-flop. When compared at the same information transmission speed, proposed circuit is more competitive. Furthermore, it can perform up to high frequency of 15 GHz and drive heavier load. All the results prove that proposed circuit is high-performance and very suitable for high-speed and high-frequency applications.

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