A Novel and High Performance Implementation of 8x8 Multiplier based on Vedic Mathematics using 90nm Hybrid PTL /CMOS Logic
2013 ◽
Vol 69
(27)
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pp. 27-33
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2021 ◽
Vol 1964
(6)
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pp. 062031
Keyword(s):
2019 ◽
Vol 102
(3)
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pp. 501-506
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Keyword(s):
International Journal of Advanced Research in Electrical Electronics and Instrumentation Engineering
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2014 ◽
Vol 03
(10)
◽
pp. 12636-12643
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