Design of Low Voltage Low Power OP-AMP using DTMOS Technique

A fourth-order low-pass continuous-time filter for a WSN transmitter is presented. The active RC filter was chosen for the high linearity, designed by using the leapfrog topology imitates the passive filter. The operation amplifier (op-amp) adopted by the filter is feed-forward operation amplifier, which could get the GBW as large as possible under the low power consumption. The cut-off frequency deviation due to the process corner, aging and temperature deviation is adjusted by an automatic frequency tuning circuit. The filter in a 0.18μm RF CMOS technology consumes 1mW from a 1V power supply. The measured results of the chip show that the bandwidth is about 1.5MHz. The voltage gain of filter is about-4.5dB with the buffer, the ripple in the pass-band is lower than 0.5 dB, and the channel rejection ratio is larger than 30dB at 4MHz.

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Low-voltage low-power super class-AB CMOS op-amp with rail-to-rail input/output swing

Proceedings of the Fifth IEEE International Caracas Conference on Devices, Circuits and Systems, 2004. ◽

10.1109/iccdcs.2004.1393358 ◽

2005 ◽

Cited By ~ 2

Author(s):

S. Baswa ◽

M. Bikumandla ◽

J. Ramirez-Angulo ◽

A.J. Lopez-Martin ◽

R.G. Carvajal ◽

...

Keyword(s):

Low Power ◽

Low Voltage ◽

Input Output ◽

Class Ab ◽

Op Amp ◽

Rail To Rail ◽

Output Swing

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Low Voltage Low Power Op Amp with Gain Boosting and Frequency Compensation Technique for Battery Powered Applications

Information and Communication Technologies - Communications in Computer and Information Science ◽

10.1007/978-3-642-15766-0_66 ◽

2010 ◽

pp. 417-422

Author(s):

K. Sarangam ◽

Hameed Zohaib Samad

Keyword(s):

Low Power ◽

Low Voltage ◽

Frequency Compensation ◽

Op Amp ◽

Compensation Technique

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Design of CNTFET-Based CCII Using gm/ID Technique for Low-Voltage and Low-Power Applications

Journal of Circuits System and Computers ◽

10.1142/s0218126620501431 ◽

2019 ◽

Vol 29 (09) ◽

pp. 2050143 ◽

Cited By ~ 1

Author(s):

Mohd Yasir ◽

Naushad Alam

Keyword(s):

Carbon Nanotube ◽

Low Power ◽

Analog Circuits ◽

Low Voltage ◽

Drain Current ◽

Current Gain ◽

Class Ab ◽

Op Amp ◽

Analog Ic ◽

The Difference

This paper introduces for the first time all the steps required in the optimal design of carbon nanotube field-effect transistor (CNTFET)-based second generation current conveyor (CCII) using transconductance-to-drain current ratio ([Formula: see text]) technique for low-voltage (LV) and low-power (LP) applications. The [Formula: see text] technique is a well-established methodology for CMOS analog IC design. However, the difference between CMOS and CNTFET is that CMOS has continuous width while the width of CNTFET is discrete and depends on different parameters like the number of tubes, pitch and diameter ([Formula: see text]) of the carbon nanotube (CNT). Therefore, there is a need for a design technique by which one can easily design analog circuits using CNTFETs. The CCII is based on two-stage op-amp and two inverters used as class AB amplifiers. The performance of CCII has been extensively examined in terms of DC, AC and transient responses of node voltages, branch currents and node impedances using HSPICE simulations. The CCII operates at [Formula: see text]0.5[Formula: see text]V and has 172[Formula: see text][Formula: see text]W of power consumption. The designed CCII provides very high 3-dB bandwidth (BW) for current gain ([Formula: see text][Formula: see text]GHz as well as voltage gain ([Formula: see text][Formula: see text]GHz.

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Design Low Voltage FGMOS Operational Amplifier for Power Applications

Advanced Materials Research ◽

10.4028/www.scientific.net/amr.433-440.4189 ◽

2012 ◽

Vol 433-440 ◽

pp. 4189-4193 ◽

Cited By ~ 3

Author(s):

M. B. K. Jamal ◽

S. P. Chew ◽

B. I. Khadijah ◽

S. B. M. Noormiza

Keyword(s):

Low Power ◽

Low Voltage ◽

Electronic Device ◽

Supply Voltage ◽

High Gain ◽

Battery Life ◽

Op Amp ◽

Integration Density ◽

Low Power Dissipation ◽

High Bandwidth

Due to the rise in demand for portable electronic device, low power and low voltage circuit design is extremely important for the appliances like computers, laptops, mobile phones and etc. Low power dissipation results in longer battery life and better integration density. This can be achieved by designing a modified low voltage op amp. The design of low voltage op amp in this paper is the combination of several low voltage analog cells. The modified low power op amp in this paper is built based on low voltage basic op amp. In this paper, the design objective is to achieve certain criteria such as supply voltage as low as 1 V, high gain more than 40 dB, low power consumption and high bandwidth. The use of FGMOS would increase the operating range of op amp through programming the threshold voltage of the FGMOS. This project is simulated using Silvaco Gateway and Expert.

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