A novel design for hardware interface board with reduced resource utilization

The final cost of an integrated circuit (IC) is proportional to its testing time. One of the main goals of test engineers when building an IC test solution is to reduce test time. Reduction of Test time is achieved by multi-site testing where multiple ICs are tested simultaneously using automated test equipment (ATE). During multi-site testing, if a certain test requires abundant resources, it is accomplished by testing one set of ICs at a time while the other ICs remain idle, thus lengthening the total test time. In digital-analog hybrid ICs, both analog and digital tests need to be performed, increasing the tester resource requirement and causing digital resource shortage. This paper describes a hardware interface board (HIB) design for a test case of a digital-analog IC on Teradyne’s ETS-364 ATE. The HIB's design allows the ATE to perform multi-site I²C based tests, which usually require lot of tester resources, utilizing only two digital resources and one measurement resource. This design achieves halving the I2C test time while lowering the number of resources necessary for multi-site testing compared to set-by-set testing. The proposed work has achieved up to 90.625% of resource reduction for multisite testing for a single test.

Creative Approaches for Thermal Hot Spot Identification on Analog IC

With the increase in the complexity of semiconductor wafer fabrication processes, the timing in responding and discovering the failure mechanism to a product failure at the initial product development stage or at the end of production line becomes a crucial factor. Effectively utilization the fault localization technique such as Photon Emission Microscopy (PEM), Laser Signal Injection Microscopy (LSIM) and Thermal Hotspot Localization (THS) may be significantly shortened the cycle time in the fault localization process. This paper will illustrate the creative approaches for thermal hot spot identification using modulated THS technique coupled with modified external electrical connection.

Desain Rangkaian Gate Driver Analog untuk Dual Mosfet Drivers

Switching techniques have been continued to develop, including sinusoidal PWM, space vector PWM, current tracking PWM, harmonic elimination PWM and others. Each method has advantages and disadvantages, but the most commonly used methods are sinusoidal PWM and space vector PWM. PWM that is generated using a microcontroller or analog IC component generally has a maximum voltage value of 5V. To strengthen the PWM wave, a gate-driver circuit is needed, so that the PWM control wave is able to move the IGBT / MOSFET. On this paper, the design of gate driver circuit use An analog IC, which starts from the generation of two waves, namely a sinusoidal wave and a DC source to be compared (Comparator) so that it can produce a PWM wave. Then this PWM wave is isolated using an optocoupler and MOSFET driver IC to limit interference in the switching process on high power supplies. Based on the results, it can be cancluded PWM control wave output from the gate-driver circuit is isolated from the system intended for designing a power converter and other applications.

Three-Output Flyback Converter with Synchronous Rectification for Improving Cross-Regulation and Efficiency

This paper proposes a single stage alternating current/direct current (AC/DC) flyback converter which contains three output windings with synchronous rectification (SR) function to achieve better cross-regulation and efficiency. Because the three output windings are stacked in a series structure and use synchronous rectification instead of diode rectification, the forward conduction loss of the diode can be eliminated, and the current of each winding can flow bilaterally. Therefore, the energy of leakage inductance can be dissipated through heavy load winding without transient overvoltage in light load winding. Compared with existing methods in the literature, the proposed converter can be realized by simple analog IC with fewer winding turns. Finally, under the extreme load imbalance condition, the cross-regulation is still within ±2.26%. The maximum efficiency of the proposed converter reaches 87%, which is about 3% higher than the conventional Schottky diode solution’s efficiency. The circuit structure and operation principle are described. A practical prototype and experiment results are implemented to verify the feasibility of the proposed converter.