Low-voltage, low-power rail-to-rail two stage op-amp with dynamic biasing and no Miller compensation

2007 ◽  
Author(s):  
Jaime Ramirez-Angulo ◽  
A. J. Lopez-Martin ◽  
Annajirao Garimella ◽  
Lalitha M. Kalyani-Garimella ◽  
R. G. Carvajal
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Two Stage ◽  
Miller Compensation ◽  
Op Amp ◽  
Rail To Rail ◽  
Dynamic Biasing

scholarly journals A 0.3 V Rail-to-Rail Ultra-Low-Power OTA with Improved Bandwidth and Slew Rate

2021 ◽  
Vol 11 (2) ◽  
pp. 19
Author(s):  
Francesco Centurelli ◽  
Riccardo Della Sala ◽  
Pietro Monsurrò ◽  
Giuseppe Scotti ◽  
Alessandro Trifiletti
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Supply Voltage ◽  
Cmos Process ◽  
Slew Rate ◽  
Large Signal ◽  
Output Stage ◽  
Ultra Low Power ◽  
Input Stage ◽  
Rail To Rail

In this paper, we present a novel operational transconductance amplifier (OTA) topology based on a dual-path body-driven input stage that exploits a body-driven current mirror-active load and targets ultra-low-power (ULP) and ultra-low-voltage (ULV) applications, such as IoT or biomedical devices. The proposed OTA exhibits only one high-impedance node, and can therefore be compensated at the output stage, thus not requiring Miller compensation. The input stage ensures rail-to-rail input common-mode range, whereas the gate-driven output stage ensures both a high open-loop gain and an enhanced slew rate. The proposed amplifier was designed in an STMicroelectronics 130 nm CMOS process with a nominal supply voltage of only 0.3 V, and it achieved very good values for both the small-signal and large-signal Figures of Merit. Extensive PVT (process, supply voltage, and temperature) and mismatch simulations are reported to prove the robustness of the proposed amplifier.

Design of Low Voltage Low Power LPF for WSN Node

2013 ◽  
Vol 760-762 ◽  
pp. 54-59
Author(s):  
Yang Lin ◽  
Zhi Qun Li ◽  
Chen Jian Wu ◽  
Meng Zhang ◽  
Zeng Qi Wang
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Frequency Tuning ◽  
Cmos Technology ◽  
Pass Band ◽  
Automatic Frequency ◽  
Temperature Deviation ◽  
Op Amp ◽  
Active Rc Filter ◽  
Operation Amplifier

A fourth-order low-pass continuous-time filter for a WSN transmitter is presented. The active RC filter was chosen for the high linearity, designed by using the leapfrog topology imitates the passive filter. The operation amplifier (op-amp) adopted by the filter is feed-forward operation amplifier, which could get the GBW as large as possible under the low power consumption. The cut-off frequency deviation due to the process corner, aging and temperature deviation is adjusted by an automatic frequency tuning circuit. The filter in a 0.18μm RF CMOS technology consumes 1mW from a 1V power supply. The measured results of the chip show that the bandwidth is about 1.5MHz. The voltage gain of filter is about-4.5dB with the buffer, the ripple in the pass-band is lower than 0.5 dB, and the channel rejection ratio is larger than 30dB at 4MHz.

A High-Speed Fully Differential Telescopic Op-Amp for Active Filter Designs in V2X Applications

2021 ◽  
Author(s):  
Furkan Barin ◽  
Ertan Zencir
Keyword(s):  
High Speed ◽  
Low Voltage ◽  
Supply Voltage ◽  
Active Filter ◽  
Ultra Wideband ◽  
Two Stage ◽  
Fully Differential ◽  
Op Amp ◽  
Current Mirrors ◽  
Design Techniques

In this paper, an ultra-wideband fully differential two-stage telescopic 65-nm CMOS op-amp is presented, which uses low-voltage design techniques such as level shifter circuits and low-voltage cascode current mirrors. The designed op-amp consists of two stages. While the telescopic first stage provides high speed and low swing, the second stage provides high gain and large swing. Common-mode feedback circuits (CMFB), which contain five transistors OTA and sensing resistors, are used to set the first-stage output to a known value. The designed two-stage telescopic operational amplifier has 41.04[Formula: see text]dB lower frequency gain, 1.81[Formula: see text]GHz gain-bandwidth product (GBW) and 51.9∘ phase margin under 5[Formula: see text]pF load capacitance. The design consumes a total current of 11.9[Formula: see text]mA from a 1.2-V supply voltage. Presented fully differential two-stage telescopic op-amp by using low-voltage design techniques is suitable for active filter in vehicle-to-everything (V2X) applications with 120[Formula: see text][Formula: see text]m[Formula: see text]m layout area.

scholarly journals Design of Low Voltage Low Power OP-AMP using DTMOS Technique

2014 ◽  
Vol 106 (18) ◽  
pp. 36-38
Author(s):  
Bhanu KumarG ◽  
Vasudeva Reddy T
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Op Amp

scholarly journals A 2.5 Gbps, 10-Lane, Low-Power, LVDS Transceiver in 28 nm CMOS Technology

Electronics ◽  
2019 ◽  
Vol 8 (3) ◽  
pp. 350 ◽  
Author(s):  
Xu Bai ◽  
Jianzhong Zhao ◽  
Shi Zuo ◽  
Yumei Zhou
Keyword(s):  
Low Power ◽  
High Speed ◽  
Low Voltage ◽  
Cmos Technology ◽  
Common Mode ◽  
Serial Interface ◽  
Common Mode Voltage ◽  
Rail To Rail ◽  
The Common ◽  
28 Nm

This paper presents a 2.5 Gbps 10-lane low-power low voltage differential signaling (LVDS) transceiver for a high-speed serial interface. In the transmitter, a complementary MOS H-bridge output driver with a common mode feedback (CMFB) circuit was used to achieve a stipulated common mode voltage over process, voltage and temperature (PVT) variations. The receiver was composed of a pre-stage common mode voltage shifter and a rail-to-rail comparator. The common mode voltage shifter with an error amplifier shifted the common mode voltage of the input signal to the required range, thereby the following rail-to-rail comparator obtained the maximum transconductance to recover the signal. The chip was fabricated using SMIC 28 nm CMOS technology, and had an area of 1.46 mm2. The measured results showed that the output swing of the transmitter was around 350 mV, with a root-mean-square (RMS) jitter of 3.65 [email protected] Gbps, and the power consumption of each lane was 16.51 mW under a 1.8 V power supply.

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