Possibility of Freely Achievable Multilevel Storage of Phase-Change Memory by Staircase-Shaped Pulse Programming

2011 ◽  
Vol 50 (10R) ◽  
pp. 105201 ◽  
Author(s):  
You Yin ◽  
Tomoyuki Noguchi ◽  
Sumio Hosaka
Keyword(s):  
Phase Change ◽  
Phase Change Memory ◽  
Multilevel Storage ◽  
Shaped Pulse ◽  
Change Memory

Random-Access Multilevel Storage in Phase Change Memory by Staircase-Like Pulse Programming

2011 ◽  
Vol 497 ◽  
pp. 111-115
Author(s):  
Ryota Kobayashi ◽  
Tomoyuki Noguchi ◽  
You Yin ◽  
Sumio Hosaka
Keyword(s):  
Phase Change ◽  
Phase Change Memory ◽  
Random Access ◽  
Experimental Results ◽  
Device Resistance ◽  
Multilevel Storage ◽  
Simulation Results ◽  
Change Memory

We have investigated random-access multilevel storage in phase change memory by staircase-like pulse programming. Staircase-like pulse consists of first sub-pulse and second sub-pulse. Our simulation exhibited that any resistance levels are expected to be randomly accessed by controlling the crystallization with different widths of second sub-pulset2. Based on the simulation results, we did experiment on staircase-like pulse programming. Experimental results showed that the device resistance gradually increased with reducing second sub-pulset2to 0 ns. In other words, random access to any resistance levels was demonstrated to be possible simply by changingt2.

Ultra-Multilevel-Storage Phase Change Memory

2014 ◽  
Vol 936 ◽  
pp. 599-602
Author(s):  
You Yin ◽  
Sumio Hosaka
Keyword(s):  
Phase Change ◽  
Phase Change Memory ◽  
Single Layer ◽  
Programming Method ◽  
Promising Method ◽  
Device Structure ◽  
Material Engineering ◽  
Structure Reliability ◽  
Multilevel Storage ◽  
Change Memory

In this study, we investigated ultra-multilevel-storage (UMLS) in lateral phase change memory (PCM) on the basis of device structure, reliability and programming method. We found that the number of resistance levels was limited strictly by the number of PC layers in multilayer multilevel cell (ML-MLC). A number of distinct levels up to 16 were obtained using a simple single-layer multilevel cell (SL-MLC). And material engineering is expected to greatly improve the reliability of MLS. We believe that fast-freely-achievable (FFA)-MLC by stair-like-pulse programming is a very promising method for futures application.

Effect of a separate heater structure for crystallisation to enable multilevel storage phase-change memory

2014 ◽  
Vol 11 (5/6/7/8) ◽  
pp. 389
Author(s):  
Rosalena Irma Alip ◽  
Zulfakri Mohamad ◽  
You Yin ◽  
Sumio Hosaka
Keyword(s):  
Phase Change ◽  
Phase Change Memory ◽  
Multilevel Storage ◽  
Change Memory

Multilevel Storage in Lateral Top-Heater Phase-Change Memory

2008 ◽  
Vol 29 (8) ◽  
pp. 876-878 ◽  
Author(s):  
You Yin ◽  
Kazuhiro Ota ◽  
Naoya Higano ◽  
Hayato Sone ◽  
Sumio Hosaka
Keyword(s):  
Phase Change ◽  
Phase Change Memory ◽  
Multilevel Storage ◽  
Change Memory

Demonstration of a Novel Multilevel Storage Scheme for Phase Change Memory Using a Parameterized HSPICE Model

2019 ◽  
Vol 44 (1) ◽  
pp. 1303-1310
Author(s):  
Der-Sheng Chao ◽  
Chenhsin Lien ◽  
Yi-Bo Liao ◽  
Meng-Hsueh Chiang ◽  
Philip H. Yen ◽  
...  
Keyword(s):  
Phase Change ◽  
Phase Change Memory ◽  
Multilevel Storage ◽  
Storage Scheme ◽  
Change Memory

A Novel Phase Change Memory with a Separate Heater Characterized by Constant Resistance for Multilevel Storage

2013 ◽  
Vol 534 ◽  
pp. 136-140
Author(s):  
Rosalena Irma Alip ◽  
Ryota Kobayashi ◽  
Yu Long Zhang ◽  
Zulfakri bin Mohamad ◽  
You Yin ◽  
...  
Keyword(s):  
Finite Element Analysis ◽  
Finite Element ◽  
Phase Change ◽  
Gradual Increase ◽  
Phase Change Memory ◽  
Memory Device ◽  
Element Analysis ◽  
Multilevel Storage ◽  
Constant Resistance ◽  
Change Memory

A novel phase change memory structure with a separate heater was proposed for a multilevel storage. Finite element analysis was conducted to investigate the possibility of multilevel storage. 100 ns SET pulses, with an increasing amplitude from 0.5 V to 3 V, were applied for heating the phase change layer, Ge2Se2T5 (GST). From the simulation result, it was exhibited that the temperature in the GST layer increased gradually when an increasing pulse is applied to the separate heater layer (N-TiSi3). This implies that crystallization is well controlled by changing the amplitude of the applied SET pulse. The gradual increase in the temperature leads to gradual resistance drop, depending strongly on the capping material. The gradual resistance drop will allow multilevel storage for the memory device.

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