Accurate evaluation of fast threshold voltage shift for SiC MOS devices under various gate bias stress conditions

ABSTRACTStaggered bottom-gate hydrogenated nanocrystalline silicon (nc-Si:H) thin-film transistors (TFTs) were demonstrated on flexible colorless polyimide substrates. The dc and ac bias-stress stability of these TFTs were investigated with and without mechanical tensile stress applied in parallel to the current flow direction. The findings indicate that the threshold voltage shift caused by an ac gate-bias stress was smaller compared to that caused by a dc gate-bias stress. Frequency dependence of threshold voltage shift was pronounced in the negative gate-bias stress experiments. Compared to TFTs under pure electrical gate-bias stressing, the stability of the nc-Si:H TFTs degrades further when the mechanical tensile strain is applied together with an electrical gate-bias stress.

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Suppression of threshold voltage shift on In-Si-O-C Thin-Film Transistor with an Al2O3 Passivation Layer under Negative and Positive Gate-Bias Stress

2019 Electron Devices Technology and Manufacturing Conference (EDTM) ◽

10.1109/edtm.2019.8731167 ◽

2019 ◽

Author(s):

Kazunori Kurishima ◽

Toshihide Nabatame ◽

Takashi Onaya ◽

Kazuhito Tsukagoshi ◽

Akihiko Ohi ◽

...

Keyword(s):

Thin Film ◽

Threshold Voltage ◽

Thin Film Transistor ◽

Passivation Layer ◽

Gate Bias ◽

Threshold Voltage Shift ◽

Voltage Shift ◽

Bias Stress ◽

Gate Bias Stress

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Accurate determination of threshold voltage shift during negative gate bias stress in 4H-SiC MOSFETs by fast on-the-fly method

Japanese Journal of Applied Physics ◽

10.35848/1347-4065/abff38 ◽

2021 ◽

Author(s):

Hiroki Sakata ◽

Dai Okamoto ◽

Mitsuru SOMETANI ◽

Mitsuo OKAMOTO ◽

Hirohisa Hirai ◽

...

Keyword(s):

Threshold Voltage ◽

Accurate Determination ◽

Gate Bias ◽

Threshold Voltage Shift ◽

Voltage Shift ◽

Bias Stress ◽

Gate Bias Stress

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Drain Bias Dependent Threshold Voltage Shift of a-Si:H TFT Due to the Pulsed Stress

MRS Proceedings ◽

10.1557/proc-0989-a14-03 ◽

2007 ◽

Vol 989 ◽

Author(s):

Sang-Geun Park ◽

Jae-Hoon Lee ◽

Sang-Myen Han ◽

Sun-Jae Kim ◽

Min-Koo Han

Keyword(s):

Threshold Voltage ◽

Pulse Width ◽

Gate Insulator ◽

Gate Bias ◽

Negative Pulse ◽

Threshold Voltage Shift ◽

Voltage Shift ◽

Bias Stress ◽

Drain Bias ◽

Gate Bias Stress

AbstractWe have investigated the shift of threshold voltage in the a-Si:H TFT due to the various negative pulse width stress. The drain bias dependent threshold voltage shift in the pulsed stress of a-Si:H TFT for AMOLED backplane is also measured and analyzed. When a positive gate and drain bias is applied to a-Si:H TFT (W/L = 200/4 Ým), VTH of a-Si:H TFT is increased during the stress time due to the defect state creation and charge trapping. VTH of a-Si:H TFT is increased from 1.645V to 2.53V (δVTH=0.885V) after the DC gate bias stress of VGS=15V, VDS=0V for 20,000sec. When the pulsed negative bias stress is applied to the gate electrode of the current driving a-Si:H TFT with the drain bias, VTH shift is considerably reduced due to the hole trapping into the gate insulator during the stress. When a negative pulse width is 16msec (pulse of 60Hz), the VTH is increased form 1.594V to 2.195V (δVTH=0.601V). When a negative pulse width increases from 16msec to 5sec without drain bias (VDS=0V), VTH is increased from 1.615V to 2.055V (δVTH=0.44V). When a drain bias is increased from 0V to 15V, VTH is slightly decreased from 1.58V to 1.529V (δVTH=-0.051V) due to large (-30V) VGD (VG=-15V, VD=15V) bias, while it is increased from 1.66V to 2.078V (δVTH=0.418V) width DC gate bias stress of VGS=15V, VDS=15V for 20,000sec.

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