Simulation of planar single-gate Si tunnel FET with average subthreshold swing of less than 60 mV/decade for 0.3 V operation
2018 ◽
Vol 57
(4S)
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pp. 04FD09
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2016 ◽
Vol 91
◽
pp. 105-111
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2016 ◽
Vol 15
(1)
◽
pp. 74-79
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Keyword(s):
2019 ◽
Vol 40
(6)
◽
pp. 989-992
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A Novel Tunnel FET Design With Stacked Source Configuration for Average Subthreshold Swing Reduction
2016 ◽
Vol 63
(12)
◽
pp. 5072-5076
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