Reduced Interfacial Layer Thickness and Gate Leakage Current of ALD Grown HfAlO with TaN Gates using Chemical Oxides and Spike-Annealing

2007 ◽  
Author(s):  
Yao-Jen Lee ◽  
Bo-An Tsai ◽  
Hsin-Yi Peng ◽  
Charles Pei-Jer Tzeng ◽  
Kuei-Shu Chang-Liao
2006 ◽  
Vol 912 ◽  
Author(s):  
Kanna Adachi ◽  
Kazuya Ohuchi ◽  
Nobutoshi Aoki ◽  
Hideji Tsujii ◽  
Takayuki Ito ◽  
...  

AbstractWe have investigated MSA, namely, Laser Spike Annealing (LSA) and Flash Lamp Annealing (FLA), dopant activation technology of source/drain extension for 45 nm node, which can be substituted for spike RTA. Since it is possible to achieve a similar relation between a sheet resistance and a junction depth by using either FLA or LSA, both annealing methods are capable of providing the junction characteristics required by the ITRS target. However, we have noticed that there are three crucial issues from the viewpoints of device integration and CMOSFET performance: junction leakage current, gate leakage current and pattern dependence. In this report, we discuss these issues and indicate how to cope with them.


2015 ◽  
Vol 62 (10) ◽  
pp. 3449-3452 ◽  
Author(s):  
Sreenidhi Turuvekere ◽  
Amitava DasGupta ◽  
Nandita DasGupta

2018 ◽  
Vol 328 ◽  
pp. 30-34 ◽  
Author(s):  
Qi Wang ◽  
Yaomi Itoh ◽  
Tohru Tsuruoka ◽  
Masakazu Aono ◽  
Deyan He ◽  
...  

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