Emulation of High Frequency Substrate Noise in CMOS Digital Circuits with Effects of Adjusting Clock Skew

Mapping Intimacies ◽

10.7567/ssdm.2013.ps-5-5 ◽

2013 ◽

Author(s):

S. Shimazaki ◽

S. Taga ◽

T. Makita ◽

N. Azuma ◽

N. Miura ◽

...

Keyword(s):

High Frequency ◽

Digital Circuits ◽

Substrate Noise ◽

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Emulation of high-frequency substrate noise generation in CMOS digital circuits

Japanese Journal of Applied Physics ◽

10.7567/jjap.53.04ee06 ◽

2014 ◽

Vol 53 (4S) ◽

pp. 04EE06

Author(s):

Shunsuke Shimazaki ◽

Shota Taga ◽

Tetsuya Makita ◽

Naoya Azuma ◽

Noriyuki Miura ◽

...

Keyword(s):

High Frequency ◽

Digital Circuits ◽

Noise Generation ◽

Substrate Noise

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High Frequency RFCMOS Substrate Noise Sensor

AEU - International Journal of Electronics and Communications ◽

10.1016/j.aeue.2021.154046 ◽

2021 ◽

pp. 154046

Author(s):

K. Moustakas ◽

T. Noulis ◽

S. Siskos

Keyword(s):

High Frequency ◽

Substrate Noise

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Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients

Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324) ◽

10.1145/513918.514021 ◽

2002 ◽

Author(s):

Mustafa Badaroglu ◽

Kris Tiri ◽

StÉphane Donnay ◽

Piet Wambacq ◽

Hugo De Man ◽

...

Keyword(s):

Noise Reduction ◽

Digital Circuits ◽

Substrate Noise ◽

Tree Optimization ◽

Supply Current ◽

Current Transients

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Inductor shielding strategies to protect mmW LC-VCOs from high frequency substrate noise

Microelectronics Journal ◽

10.1016/j.mejo.2013.02.010 ◽

2013 ◽

Vol 44 (5) ◽

pp. 405-413

Author(s):

Marc Molina ◽

Xavier Aragonès ◽

Diego Mateo ◽

José Luis González

Keyword(s):

High Frequency ◽

Substrate Noise

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Effects of power-supply parasitic components on substrate noise generation in large-scale digital circuits

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185) ◽

10.1109/vlsic.2001.934226 ◽

2002 ◽

Author(s):

M. Nagata ◽

T. Ohmoto ◽

Y. Hlurasaka ◽

T. Morie ◽

A. Iwata

Keyword(s):

Power Supply ◽

Large Scale ◽

Digital Circuits ◽

Noise Generation ◽

Substrate Noise ◽

Parasitic Components

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Analysis of NBTI Effects on High Frequency Digital Circuits

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE) ◽

10.3850/9783981537079_0226 ◽

2016 ◽

Author(s):

Ahmet Unutulmaz ◽

Domenik Helms ◽

Reef Eilers ◽

Malte Metzdorf ◽

Ben Kaczer ◽

...

Keyword(s):

High Frequency ◽

Digital Circuits

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A comparative study of the behavior of NMOS and CMOS digital circuits under substrate noise

ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483) ◽

10.1109/icecs.2001.957710 ◽

2002 ◽

Author(s):

R.M. Secareanu ◽

S. Warner ◽

S. Seabridge ◽

C. Burke ◽

T.E. Watrobski ◽

...

Keyword(s):

Comparative Study ◽

Digital Circuits ◽

Substrate Noise

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High frequency lumped element models for substrate noise coupling

Proceedings of the 2003 IEEE International Workshop on Behavioral Modeling and Simulation ◽

10.1109/bmas.2003.1249856 ◽

2004 ◽

Author(s):

C. Xu ◽

T. Fiez ◽

K. Mayaram

Keyword(s):

High Frequency ◽

Substrate Noise ◽

Lumped Element ◽

Noise Coupling ◽

Substrate Noise Coupling

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Quantitative characterization of substrate noise for physical design guides in digital circuits

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044) ◽

10.1109/cicc.2000.852626 ◽

2002 ◽

Author(s):

M. Nagata ◽

J. Nagai ◽

T. Morie ◽

A. Iwata

Keyword(s):

Digital Circuits ◽

Physical Design ◽

Substrate Noise ◽

Quantitative Characterization

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Replica bias scheme for efficient power utilization in high-frequency CMOS digital circuits

2014 IEEE International Symposium on Circuits and Systems (ISCAS) ◽

10.1109/iscas.2014.6865307 ◽

2014 ◽

Author(s):

Saravanan Kathiah ◽

Sankaran Aniruddhan

Keyword(s):

High Frequency ◽

Digital Circuits ◽

Efficient Power

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