Efecto del entrenamiento en ábaco mental sobre la flexibilidad cognitiva: un estudio exploratorio

Mental Abacus (MA) training teaches students to solve math problems by visualizing a physical abacus structure to perform arithmetic operations. Research shows that MA practice relates with enhanced working memory in children, but other cognitive processes that could mediate the benefits registered remain unknown. The aim of the study was to analyze the effect of MA training in a cognitive flexibility task in twelve-year-old children, and compare it with a control group. 121 children from the sixth course of primary education were recruited. 54 students received MA training added during the academic year, while the control group received normative arithmetic instruction. MA training was provided by UCMAS Mental Arithmetic Spain S.L. To assess cognitive flexibility, we used the Trail Making Test (TMT). Data analysis entailed parametric assumptions check and a one-way ANOVA between MA and control group. There were no differences between groups in age. There were statistical differences in TMT-A (Z=-5,78, p<,001, d=,67) and TMT-B scores (Z=-2,24, p=,021, d=,08). Our data suggest that MA enhances cognitive flexibility in children. MA is a promising tool teaching math which benefits go beyond arithmetic calculation.

Hardware description of a simplified 4-bit softcore processor with BCD capabilities

The objective of the work reported in this paper is to improve a 4-bit softcore processor previously designed in Verilog language, keeping its compact size. This processor was thought to be used as academic and didactic tool for teaching as computers architecture subject as digital circuits subject in the technology faculty of the Universidad Distrital. The new features include arithmetic instruction with input carry, BCD operations enabling, rotating instructions, implementation of input and output register banks, increase of the number of general purpose registers of the data memory, and the reduction of the execution clock cycles per instruction. Additionally, the assembler software was enabled to support macro-instructions to make easy the comprehension of some composed functions. As result, a very compact softcore processor was obtained, by means of a Verilog description done in a single file. This implementation occupies only the 2% of the medium-size FPGA used for the application, reaching a maximum possible working clock frequency of 929 Mhz.

Introducing Division Through Problem-Solving Experiences

Teaching computational procedures has traditionally been the goal of instruction in arithmetic. Instruction usually moves from developing the concept to introducing the notation and then to teaching the algorithm. The emphasis is on having pupils learn to do calculations. Applications to problem situations follow.