thin semiconductor
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2022 ◽  
Vol 3 (1) ◽  
pp. 101015
Author(s):  
Yonghwan Lee ◽  
Bikesh Gupta ◽  
Hark H. Tan ◽  
Chennupati Jagadish ◽  
Jihun Oh ◽  
...  

Author(s):  
Jefferson Talledo

Thinner semiconductor package is becoming popular especially in consumer electronics applications. As package becomes thinner, it is more vulnerable to package crack when subjected to external load. It is important to ensure that the package is strong enough to resist package cracking. This paper presents the study of package flexural strength under different epoxy mold compound curing condition. A 3-point bend test was done to characterize the breaking strength of the package that was subjected to post-mold curing. It was then compared to the strength of the package not subjected to post-mold curing (PMC). Results of the bend testing showed that the package flexural strength is much lower when the package is not subjected to post-mold curing. This study demonstrates that the measurement of flexural strength can be used to determine if the package has undergone post-mold curing or not. Performing the right post-mold curing of the thin molded package is required to ensure higher flexural strength.


Author(s):  
Jefferson Talledo

Very thin semiconductor package is very prone to package crack. This paper discusses the stress modeling study conducted to understand the package crack problem in a specific smart card package. Finite element analysis (FEA) was used to analyze the maximum package stress level and corresponding location to find out if the presence of debris during the package assembly punching process could cause such problem and how it would happen. Based on the stress results, it was confirmed that even with a 60μm-thick piece of debris under the package, crack at the top is possible due to package bending and mold stress exceeding the flexural strength of the package mold material. The stress increases as the debris location is moved closer to the area where force is applied during the punching process. The study shows that the presence of debris should not be taken for granted though how small the debris may seem because significantly high bending stress could still be induced especially for very thin packages. Eliminating any source of debris in the package assembly process.is very important to prevent package crack.


2020 ◽  
Vol 2 (4) ◽  
Author(s):  
Olivier Bleu ◽  
Guangyao Li ◽  
Jesper Levinsen ◽  
Meera M. Parish
Keyword(s):  

Nature ◽  
2020 ◽  
Vol 587 (7832) ◽  
pp. 72-77 ◽  
Author(s):  
Guilherme Migliato Marega ◽  
Yanfei Zhao ◽  
Ahmet Avsar ◽  
Zhenyu Wang ◽  
Mukesh Tripathi ◽  
...  
Keyword(s):  

2020 ◽  
Vol 34 (25) ◽  
pp. 2050225
Author(s):  
Baoguang Sun ◽  
Xiaofeng Wang ◽  
Canmei Zhou ◽  
Yuqin Fan

Due to the large difference in mode size and effective-index mismatch between the optical fiber and the waveguides on the photonic integrated circuits, it is a big challenge to efficiently couple light into thin semiconductor waveguides. In this paper, a taper plasmonic coupler is presented to couple fiber light into an Si waveguide. The taper plasmonic coupler structure is optimized, and the alignment tolerance of the gap, the lateral offset and the vertical offset between coupler and Si waveguide are studied. Numerical simulation shows that the coupler changes the single mode fiber light to multimode light at its input port section, while at its output port section, the coupler turns the multimode light back to a single mode light, and finally couples this light to Si waveguide. The maximum couple efficiency is 86.8% in [Formula: see text] effective coupler length.


Author(s):  
R. Rodriguez ◽  
F. R. Gomez ◽  
J. Pulido

This paper presents the application of an innovative design of wirebond process plate during wirebonding process of thin semiconductor carrier such as the pre-encapsulated leadframe. The implementation of the specialized process plate aims to improve the conventional method of wirebonding from panel type to single-row design to reduce the occurrence of warpage on thin leadframes. In this study, an 85% reduction for warpage level is achieved after the introduction of the new design of process plate. Future works could use the improved process plate design for devices of similar configuration.


2020 ◽  
Vol 124 (35) ◽  
pp. 19196-19203
Author(s):  
Shaojun Wang ◽  
T.V. Raziman ◽  
Shunsuke Murai ◽  
Gabriel W. Castellanos ◽  
Ping Bai ◽  
...  

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