Worm addendum thickness and gear curvature interference for enveloping cylindrical worm drive with arc-toothed worm

The purpose of this paper is to provide the calculation methods on worm addendum thickness and curvature interference limit line, and find the feasible value range of the technological crossing angle to avoiding addendum sharpening and curvature interference for enveloping cylindrical worm drive with arc-toothed worm. In accordance with the features of the proposed worm, the mathematical models of cutting and working are established. Based on this, the tooth profile geometry of the worm in its axial section and the worm addendum thickness are obtained by geometric analysis and calculation, and then, the feasible value range of the technological crossing angle is given. In virtue of vector rotation and elimination method, the nonlinear equation with one variable for solving the interference limit line is determined. In the process of solving nonlinear equation, the method of geometric construction is used to judge the existence of solutions and provide an initial value for the subsequent iterative calculation. The numerical example results show that with the increases of the technological crossing angle, the interference limit line is close to the boundary line of the conjugate region of the worm pair, and the hazard of curvature interference evident increases. Generally, a smaller value of the technological crossing angle within its available value range can completely avoid the occurrence of the curvature interference.

Voltage controlled Néel vector rotation in zero magnetic field

Multi-functional thin films of boron (B) doped Cr2O3 exhibit voltage-controlled and nonvolatile Néel vector reorientation in the absence of an applied magnetic field, H. Toggling of antiferromagnetic states is demonstrated in prototype device structures at CMOS compatible temperatures between 300 and 400 K. The boundary magnetization associated with the Néel vector orientation serves as state variable which is read via magnetoresistive detection in a Pt Hall bar adjacent to the B:Cr2O3 film. Switching of the Hall voltage between zero and non-zero values implies Néel vector rotation by 90 degrees. Combined magnetometry, spin resolved inverse photoemission, electric transport and scanning probe microscopy measurements reveal B-dependent TN and resistivity enhancement, spin-canting, anisotropy reduction, dynamic polarization hysteresis and gate voltage dependent orientation of boundary magnetization. The combined effect enables H = 0, voltage controlled, nonvolatile Néel vector rotation at high-temperature. Theoretical modeling estimates switching speeds of about 100 ps making B:Cr2O3 a promising multifunctional single-phase material for energy efficient nonvolatile CMOS compatible memory applications.

Method of remote control of the position of the movable part of the elastic connecting unit

A method for remote control of the position in space of the movable part of the elastic connecting unit is proposed. The control is carried out by continuous measurement of six lengths between the tops of two triangles, rigidly connected, respectively, with the fixed and the movable parts of the connecting unit. For measuring the lengths, it is proposed to use Вт 718 cable sensors. Keywords: elastic connecting joint, remote control of coordinates, displacement vector, rotation vector. [email protected]

Voltage controlled Néel vector rotation in zero magnetic field at CMOS-compatible temperatures

Multi-functional thin films of boron (B) doped Cr2O3 exhibit voltage-controlled and nonvolatile Néel vector reorientation in the absence of an applied magnetic field, H. Toggling of antiferromagnetic states is demonstrated in prototype device structures at CMOS compatible temperatures between 300 and 400 K. Boundary magnetization associated with the Néel vector orientation serves as state variable which is read via magnetoresistive detection in a Pt Hall bar adjacent to the B: Cr2O3 film. Switching of the Hall voltage between zero and negative values implies Néel vector rotation by 90-degree. Magnetometry, spin resolved inverse photoemission, electric transport measurements and piezo force microscopy reveal B-dependent TN and resistivity enhancement, spin-canting, anisotropy reduction and dynamic polarization hysteresis. Their combined effect enables H=0, voltage controlled, nonvolatile Néel vector rotation at high-temperature. Theoretical modeling estimates switching speeds of about 100ps making B: Cr2O3 a promising multifunctional single-phase material for energy efficient nonvolatile CMOS compatible memory applications.

Implementação do algoritmo CORDIC para cálculo de seno e cosseno em FPGA

O presente trabalho apresenta a implementação em hardware para cálculo das funções trigono-métricas seno e cosseno por meio de rotação vetorial utilizando o algoritmo CORDIC. O código foi sintetizado no FPGA DE10-Lite da Terasic Inc. com as ferramentas de desenvolvimento da Altera/Intel para família MAX 10. Com o objetivo de avaliar o desempenho da implementação em hardware, é realizado uma comparação com o algoritmo desenvolvido em Python e seus resultados são apresentados. Tais resultados demonstram a precisão numérica da arquitetura proposta para a implementação do CORDIC no FPGA versus Python, não considerando o tempo de execução. Palavras-chave: CORDIC. Verilog. FPGA. Implentation of Cordic algorithm for sine and cosine calculation in FPGA Abstract The present work presents the hardware implementation for calculating the trigonometric functions sine and cosine by means of vector rotation using the CORDIC algorithm. The code was synthetized in the DE10-Lite Board from Terasic Inc. with Altera/Intel development tools for MAX Family 10. In order to evaluate the performance of the hardware implementation, a comparison with the algorithm developed in Python is performed and its results are presented. These results demonstrate the numerical precision of the proposed architecture for the implementation of CORDIC in FPGA versus Python, not considering the execution time. Keywords: CORDIC. Verilog. FPGA. Python.