Investigation of SiC Trench MOSFETs’ Reliability under Short-Circuit Conditions

In this paper, the short-circuit robustness of 1200 V silicon carbide (SiC) trench MOSFETs with different gate structures has been investigated. The MOSFETs exhibited different failure modes under different DC bus voltages. For double trench SiC MOSFETs, failure modes are gate failure at lower dc bus voltages and thermal runaway at higher dc bus voltages, while failure modes for asymmetric trench SiC MOSFETs are soft failure and thermal runaway, respectively. The shortcircuit withstanding time (SCWT) of the asymmetric trench MOSFET is higher than that of the double trench MOSFETs. The thermal and mechanical stresses inside the devices during the short-circuit tests have been simulated to probe into the failure mechanisms and reveal the impact of the device structures on the device reliability. Finally, post-failure analysis has been carried out to verify the root causes of the device failure.

Influence of Different Device Structures on the Degradation for Trench-Gate SiC MOSFETs: Taking Avalanche Stress as an Example

The variations in the degradation of electrical characteristics resulting from different device structures for trench-gate SiC metal-oxide-semiconductor field effect transistors (MOSFETs) are investigated in this work. Two types of the most advanced commercial trench products, which are the asymmetric trench SiC MOSFET and the double-trench SiC MOSFET, are chosen as the targeted devices. The discrepant degradation trends caused by the repetitive avalanche stress are monitored. For the double-trench device, the conduction characteristic improves while the gate-drain capacitance (Cgd) increases seriously. It is because positive charges are injected into the bottom gate oxide during the avalanche process, which are driven by the high oxide electronic field (Eox) and the high impact ionization rate (I.I.) there. Meanwhile, for the asymmetric trench SiC MOSFET, the I–V curve under the high gate bias condition and the Cgd remain relatively stable, while the trench bottom is well protected by the deep P+ well. However, it’s threshold voltage (Vth) decreases more obviously when compared with that of the double-trench device and the inclined channel suffers from more serious stress than the vertical channel. Positive charges are more easily injected into the inclined channel. The phenomena and the corresponding mechanisms are analyzed and proved by experiments and technology computer-aided design (TCAD) simulations.

Control of Cu morphology on Ru-passivated and Ru-doped TaN Surfaces – promoting growth of 2D conducting copper for CMOS interconnects

Prolonging the lifetime of Cu as level 1 and level 2 interconnect metal in future nanoelectronic devices is a significant challenge as device dimensions continue to shrink and device structures...

Mathematical and computer simulation of semiconductor systems of various dimensions and the elements of device structures based on them

The article, in the form of a minireview, reflects the results of theoretical, and partly experimental investigations of the electrical, optical and magnetic phenomena in three-dimensional, two-dimensional, one-dimensional and zero-dimensional systems and elements of device structures made of germanium, silicon, carbon and other chemical elements carried out at the Faculty of Physics of Belarusian State University over the past 25 years.

Development of a method for producing effective CdS/CdTe/Cu/Au solar elements on a flexible substrate designed for backup supplying systems prevention of emergency situations

The technology of forming film solar cells based on CdS / CdTe configuration of the "superstrat" type on a flexible substrate has been improved. To increase the efficiency of the developed solar cells on a flexible substrate, a chemical etching procedure in a nitrogen-phosphorus mixture was added to the traditional "chemical treatment". The conducted studies of the output parameters of the developed device structures showed that the highest values are observed in the case of chemical etching, both before the "chloride treatment" and after it. In the course of the study, it was found that a mandatory procedure in the formation of effective device structures is chemical etching in a nitrogen-phosphorus mixture both before the "chloride treatment" and after it. Carrying out the described procedures made it possible to obtain solar cells on a flexible substrate with an efficiency of 13.1 %. The increase in the efficiency of solar cells with two-stage chemical etching can be explained by the formation of excess tellurium on the surface, which leads to a decrease in resistance and, therefore, to a more efficient penetration of chlorine during the subsequent chloride treatment. Analysis of the transverse cleavage of the investigated device structures demonstrates significant grain growth and surface smoothness of the base layer, which ensures good adhesion with back contact. A study of the degradation resistance of the developed device structures during operation has been carried out. It was found that the obtained solar cells based on CdTe on a flexible substrate have a high degradation resistance and after 10 bending cycles there is no decrease in the output parameters. Thus, it has been established that chemical etching in a nitrogen-phosphorus mixture is a mandatory procedure for the formation of efficient solar cells on a flexible substrate.

Understanding the Thermal Time Constants of GaN HEMTs through Model Order Reduction Technique

This paper described a comparison between a numerical Finite Element Analysis (FEA) and an analytical approach in order to extract the thermal time constants and the thermal resistances of simple but realistic structures. Understanding the complex contribution of multidimensional thermal spreading, the effect of multiple layers, and the correlation with the heat source length is mandatory due to the severe mismatch of thermal expansion in different epitaxial layers and high operating temperatures. This is especially true on GaN HEMT (High Electron Mobility Transistor) with the continuous decrease of the gate length and the increase of the power density. Moreover, in this paper, we extracted the time constants with a Model Order Reduction (MOR) technique based on the Ritz vector approach with inputs coming from the FE matrices. It was found that the time constants obtained by an analytical solution and a model order extraction from FEA were exactly the same. This result validated the idea that our MOR technique provides the real time constants and resistances for our device structures and in this case unified the analytical world with the numerical one.

Plasma excited molecular beam epitaxy－proposal and achievements through R&D of compound semiconductor materials and devices－

This paper reviews 35 years of brief history on plasma-excited molecular beam epitaxy, focusing on special values added to conventional Molecular Beam Epitaxy (MBE) through usage of plasma-excited molecular beams. These include low temperature surface cleaning, low temperature growth, selected area re-growth and impurity doping. These technologies are extremely important to realize nano-scale low-dimensional device structures. InN and In-rich InGaN are also highlighted as unique material systems, which plasma-excited MBE process is inevitable to grow. Future prospect of this technology will also be included from the device application viewpoints.

Tunnelling in rare-earth nitride structures

<p>GdN thin film device structures, including magnetic tunnel junctions (MTJs), were grown by physical vapour deposition and their electrical properties were investigated. Growth compatibility between GdN and various contact metals (Al, Au, Gd and Nb) was assured using X-ray diffraction (XRD) and scanning electron microscopy (SEM) techniques. I developed a photomask and lithographic process to isolate electrical behaviour perpendicular to the plane of the films. Al and Au were confirmed to make ohmic contact to GdN, while Gd and Nb both formed Schottky-like barriers at the interface with GdN. In MTJ structures, device electrical characteristics were dominated by tunnelling behaviour through the GaN barrier layer. The Simmons model was successfully applied to tunnelling measurements of Al/GdN/GaN/GdN/Gd structured MTJs to determine the barrier properties. MTJs grown with Al bottom contacts were grown with 1.5eV potential barrier height and 2.5 nm width. Finally, MTJs contacted with Nb exhibited a large magnetoresistance (> 500%), greater than GdN-based MTJs recorded in the literature [Warring et al. ”Magnetic Tunnel Junctions Incorporating a Near-Zero-Moment Ferromagnetic Semiconductor”, Phys. Rev. Appl., vol.6, p.044002, 2016].</p>

Tunnelling in rare-earth nitride structures

<p>GdN thin film device structures, including magnetic tunnel junctions (MTJs), were grown by physical vapour deposition and their electrical properties were investigated. Growth compatibility between GdN and various contact metals (Al, Au, Gd and Nb) was assured using X-ray diffraction (XRD) and scanning electron microscopy (SEM) techniques. I developed a photomask and lithographic process to isolate electrical behaviour perpendicular to the plane of the films. Al and Au were confirmed to make ohmic contact to GdN, while Gd and Nb both formed Schottky-like barriers at the interface with GdN. In MTJ structures, device electrical characteristics were dominated by tunnelling behaviour through the GaN barrier layer. The Simmons model was successfully applied to tunnelling measurements of Al/GdN/GaN/GdN/Gd structured MTJs to determine the barrier properties. MTJs grown with Al bottom contacts were grown with 1.5eV potential barrier height and 2.5 nm width. Finally, MTJs contacted with Nb exhibited a large magnetoresistance (> 500%), greater than GdN-based MTJs recorded in the literature [Warring et al. ”Magnetic Tunnel Junctions Incorporating a Near-Zero-Moment Ferromagnetic Semiconductor”, Phys. Rev. Appl., vol.6, p.044002, 2016].</p>