Is SBIR a Government Venture Fund?

The federal government's well-known Small Business Innovation Research (SBIR) program funds small businesses that are developing and commercializing innovative new technology. It is commonly regarded as a "government venture fund." This label is unfortunate. Within the U.S., it has caused the SBIR program to be criticized both for competing with private ven- ture capital funds (VCs) and for wasting scarce taxpayer resources on small businesses that, according to some detractors, are not as successful at generating innovation as venture capital (VC)-backed companies. These criticisms divert attention from SBIR program successes, generate unnecessary drama during congressional SBIR reauthorization debates, and sideline important opportunities to improve the SBIR program. Outside the U.S., the "government venture fund" concept disguises the very real differences between the SBIR program and VCs, potentially undermining the effectiveness of government initiatives to promote innovation. There are actually few similarities between the SBIR program and VCs—aside from the fact that both provide comparable amounts of seed-stage funding to small technology firms. As a matter of public policy, it needs to be clearly understood that the SBIR program is not a government venture fund, does not compete with VCs, and has objectives of national economic and soci- etal importance that do not conflict with those of private-sector investors. This paper begins by comparing the number and size of SBIR and VC seed-stage investments in the U.S. Then it contrasts their very different objectives, company selection criteria, staging of investments, obligations imposed on recipient companies, and metrics used to measure success.

Teaching STEM Entrepreneurship With Societal Significance: Building on the Small Business Innovation Research Program

Undergraduate students are aware of problems with societal significance, but few have tacit knowledge on how to address them through entrepreneurship or how to research the multidisciplinary technical, financial, and regulatory requirements. This paper describes a one-semester entrepreneurship course that teaches undergraduate students how to identify societally significant opportunities for STEM-based innovations, and how to de-risk associated business models. This course differs from traditional entrepreneurship education in three ways. First, it builds upon the federal Small Business Innovation Research (SBIR) program (“America’s Seed Fund”). Second, students learn to navigate the multidisciplinary strategic decisions that often accompany business models developed for societally impactful opportunities. Third, by becoming intimately familiar with proposal writing and submission protocols, those students willing to commit to entrepreneurship, or intrapreneurship if in the job market, have better chances of raising significant funds (>$1 M) through the SBIR program than from equity investors or commercial banks. The experiential nature of the course promotes students’ ability to discover tacit opportunities, whereas learning SBIR protocols promotes students’ ability to discover codified opportunities. The paper presents the pedagogical concepts, learning objectives, and evaluation criteria of this novel course.

Evaluation of the Small Business Innovation Research Program in Japan

The Small Business Innovation Research (SBIR) program conducted by the Japanese government is intended to enable the rapid growth of small firms. Using comprehensive empirical data, this study examines the performances of firms that are directly affected by the program. First, to provide an outline, this study compares the changes in sales, employment, and the number of patents between SBIR awardees and matched firms. It cannot be shown that SBIR awardees have better performance using those indices. Second, this study conducts regression analyses to control for firm sizes, multiple awards, technological levels, the value of venture capital in a region, and population in regions. As a result, this study does not find that SBIR awardees have advantages after applying these detailed controls. This study shows that further detailed investigation is required to prove the benefit of the SBIR program.

A Current-Controlled PCB Integrated MEMS Tilt Mirror

Introduction: MEMS Tilt Mirror - a miniature planar micro-mirror that can experience a 1-D or 2-D tilt in response to a control signal. Commonly used technologies- electrostatic, piezoelectric, electrothermal bimorph. Applications - laser beam steering, interferometers, dynamic signal analyzers, opticcal cross-connect switches. This paper describes the design, key features and applications of a System On Chip (SOC) ASIC (Application Specific Integrated Circuit) that has been developed under an Air Force SBIR program. The SOC device has been implemented by Honeywell International using their High Temperature SOI (Silicon On Insulator) Process. The objective of the Air Force SBIR program {1} was to investigate the potential for use of available High Temperature SOI technology devices for aerospace propulsion control system applications. Several prototype designs implemented by Embedded Systems LLC (ES-LLC) using available SOI devices identified significant limitations in the performance capability and level of integration. The diversity of propulsion system interfacing requirements demanded generic solutions so that they could be deployed in multiple applications without changes. The available devices were also not affordable due to the limited size of the market for this technology. It was therefore decided to develop a generic, reconfigurable SOC chipset {2} that could be implemented using Honeywell's HT200 Family of ASIC Gate Arrays. The paper will describe the architecture and key features of the SOC chipset solution which can be reconfigured to interface with most typical aerospace control system sensors and actuators. The SOC chipset captures all of the necessary functions required to interface with sensors such as RTD (resistance Temperature Detectors), Strain Gauges (SG) and thermocouples (TC), mass flow, speed and LVDT (Linear Variable Differential Transducer) position. The excitation circuitry required to power these interfaces is embedded in the chipset and can be reconfigured as required. The SOC chipset also contains all of the pre- and post-processing functions to convert electrical signals into digital words and send them on a data bus under the control of a host microprocessor. The SOC chipset can be powered from a Mil-Std 704F compliant power source or a conditioned DC power source. The SOC chipset when combined with other external devices can be implemented as a “Smart Node” for localized management of sensors and actuators as a part of a distributed architecture or used as a scalable building block in a more complex function such as a FADEC (Full Authority Digital Engine Control). The SOC chipset thus completes the set of all High Temperature SOI Integrated circuits required for implementation of typical Smart Nodes. It is believed that the versatility of the SOC chipset makes it a well suited, affordable, scalable building block for not only aerospace controls but also for diverse applications such as down-hole drilling, energy exploration, wind farms etc. where high temperature electronics is required.