Automated Measurement and Analysis of Sidewall Roughness (SWR) Using 3D-AFM

As the semiconductor device architecture develops, from planar field-effect transistor (FET) to FinFET and toward gate all around (GAA), it is more needed to measure 3D structure sidewall precisely. Here, we present a 3D-atomic force microscopy (3D-AFM) by Park Systems Corp., a powerful 3D metrology tool to measure SWR of vertical and undercut structures. First, we measured 3 different dies repeatedly to calculate reproducibility in die level. Reproducible results were derived with relative standard deviation under 2%. Second, we measured 13 different dies, including the center and edge of the wafer, to analyze SWR distribution in wafer level and reliable results were measured. And all analysis was performed using a novel algorithm including auto flattening, sidewall detection, and SWR calculation. In addition, SWR automatic analysis software was implemented to reduce analysis time and to provide standard analysis. The result suggests that our 3D-AFM based on tilted Z scanner enabled an advanced methodology for automated 3D measurement and analysis.

Explore3DM—A Directory and More for 3D Metrology

Explore3DM will be an online resource to explore the diverse interests behind three-dimensional measurement and three-dimensional metrology (3DM). The motivation has been the development of large-volume and portable 3D methods and systems for applications in manufacturing, an activity which has been growing for the past 40 years. However, the measurement spectrum in Explore3DM will be wider and include, for example, as-built process plant at the large-object end and X-Ray CT inspection at the small-object end. This wider spectrum will support cross-sector research at University College London (UCL) to transfer 3DM developments from one sector to another. Initially, Explore3DM will have a core directory incorporating systems manufacturers, service suppliers, research groups and disseminators of metrology knowledge. Mechanisms for solving end users’ measurement tasks will add to further growth of 3DM. The resource is intended to be free to use and the directory free to join at a basic level. Premium directory sponsorship by commercial companies is expected to provide revenue to sustain and develop the resource and support 3DM development. With regard to standards, LVM and PCM systems and techniques can be difficult to assess with a standardized approach because of the highly flexible ways they can be applied. However, some standards have been developed and there is scope for more, for example in the terminology used. A dictionary will be a component of Explore3DM’s future knowledge base. By presenting a first version in a centralized resource, standardized terminology will be encouraged.

Improving Geometric Accuracy of 3D Printed Parts Using 3D Metrology Feedback and Mesh Morphing

Additive manufacturing (AM), also known as 3D printing, has gained significant interest due to the freedom it offers in creating complex-shaped and highly customized parts with little lead time. However, a current challenge of AM is the lack of geometric accuracy of fabricated parts. To improve the geometric accuracy of 3D printed parts, this paper presents a three-dimensional geometric compensation method that allows for eliminating systematic deviations by morphing the original surface mesh model of the part by the inverse of the systematic deviations. These systematic deviations are measured by 3D scanning multiple sacrificial printed parts and computing an average deviation vector field throughout the model. We demonstrate the necessity to filter out the random deviations from the measurement data used for compensation. Case studies demonstrate that printing the compensated mesh model based on the average deviation of five sacrificial parts produces a part with deviations about three times smaller than measured on the uncompensated parts. The deviation values of this compensated part based on the average deviation vector field are less than half of the deviation values of the compensated part based on only one sacrificial part.

IMPROVE CONTROL AMIDST DIE SHRINKAGE AND 3D PACKAGE COMPLICATION

Die sizes continue to shrink and packaging technologies continue to evolve, but the common thread for all of them is the need for increased precision and tighter process control limits to achieve final package yield. Nearly all packaging technologies require connections in the third dimension, above or below the die, thus adding, quite literally, a new dimension to inspection and metrology requirements. Increased focus on reliability for automotive, health care and even mobile electronics is driving the need for improved process control solutions. The combination of higher packaging complexity and the need for improved reliability are driving changes to the requirements around inspection and metrology. Vertical integration continues to grow at a pervasive rate and the need for improved process control in the third dimension is growing rapidly in order to ensure reliability. Vertical integration is designed into nearly all packaging forms, including TSV, RDL, WLP, Fan-in, Fan-out, with a focus on continued increase in the number of I/Os, the pitch of features (RDL and bump) and the overall package size increasing. This integration drives the need for 3D metrology of feature height and coplanarity. In addition, the need to augment raw 3D metrology with defect inspection and 2D metrology data enables a comprehensive view (insight) into the packaging process. Achieve total bump process control with the combination of data from: (1) 2D defect detection – voids and shorts, foreign material, misprocessing; (2) 2D metrology – bump diameter, bump position, bump presence; (3) 3D inspection – bump too tall, bump too short, statistical process control (SPC); (4) Auto classifications – data must make sense and be easy to interpret. By combining high speed 2D, 3D metrology with defect inspection and advanced analytics, the quality of process control data can be exponentially improved to enable quick time-to-results for both process development and HVM control. This paper describes the inspection and metrology challenges of bumps in advanced packaging and the next generation high-throughput bump inspection methodology for wafers with extremely high bump counts as well as the data analysis