The Dual Sine Signal Generator Design Based on the Principle of Difference Frequency Filtering

The paper attempts to realize the processing scheme of low cost dual sine wave generator. It used single-chip microcomputer and CPLD(Complex Programable Logic Device) as the control core. It maked use of CPLD and discrete component simulations to implement DDS principle. It utilized the filter circuit, integrated op-amp circuit and multiplier circuit instead of DAC chip. The range of frequency, amplitude and phase difference are 1Hz~1000Hz, 1V~3V and 0o~359o, respectively. The results show that a 2-channel sine signal generator can be designed with adjustable frequency, amplitude and phase difference.

Design of a Sine Sweeping Constant Current Source Based FPGA and DDS

This paper designed a range of 0.1 ~ 250 kHz sine wave sweeping constant current source, which sine wave generator based on FPGA chip and DDS technology, the desired sine wave frequency was obtained by controlling the frequency control words. Low-pass filter circuit was realized by using the LTC1560-1, conversion circuit from the voltage to the current was consisted of a Howland current pump. The constant current source shows a good spectral impedance purity and amplitude.

Opening the Black Box: Low-Dimensional Dynamics in High-Dimensional Recurrent Neural Networks

Recurrent neural networks (RNNs) are useful tools for learning nonlinear relationships between time-varying inputs and outputs with complex temporal dependencies. Recently developed algorithms have been successful at training RNNs to perform a wide variety of tasks, but the resulting networks have been treated as black boxes: their mechanism of operation remains unknown. Here we explore the hypothesis that fixed points, both stable and unstable, and the linearized dynamics around them, can reveal crucial aspects of how RNNs implement their computations. Further, we explore the utility of linearization in areas of phase space that are not true fixed points but merely points of very slow movement. We present a simple optimization technique that is applied to trained RNNs to find the fixed and slow points of their dynamics. Linearization around these slow regions can be used to explore, or reverse-engineer, the behavior of the RNN. We describe the technique, illustrate it using simple examples, and finally showcase it on three high-dimensional RNN examples: a 3-bit flip-flop device, an input-dependent sine wave generator, and a two-point moving average. In all cases, the mechanisms of trained networks could be inferred from the sets of fixed and slow points and the linearized dynamics around them.

Research on Dual Buck Half Bridge Five-Level Inverter for Rooftop Solar System

This paper presents a novel design for dual buck half bridge five-level inverter (DBHBFLI), which based on field-programmable gate array (FPGA), and was used for photovoltaic power system. This topology is derived from dual buck half bridge inverter (DBHBI), which has the characteristics of no shoot-through problem, no body diode reverse-recovery problem, and current half-period work mode, these merits are retained in the proposed inverter. FPGA logic device is chosen for the hardware implementation of control circuit. The FPGA controller consists of six main modules: the sine wave generator module, the triangle wave generator module, the voltage proportion integration (PI) module, the current proportion (P) module, sinusoidal pulse width modulation (SPWM) module, and SPWM distribution module. VHDL is used in the design of each module. The simulation and experiment results which confirm the validity and performance of the design are shown in the paper.