Simulation of Semiconductor Processes and Devices 2004
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Published By Springer Vienna

9783709172124, 9783709106242

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Modeling B Uphill Diffusion in the Presence of Ge

Simulation of Semiconductor Processes and Devices 2004 ◽

10.1007/978-3-7091-0624-2_8 ◽

2004 ◽

pp. 33-36

Author(s):

Ljubo Radic ◽

Antonio F. Saavedra ◽

Mark E. Law

Keyword(s):

Uphill Diffusion

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SET Accurate Compact Model for SET-MOSFET Hybrid Circuit Simulation

Simulation of Semiconductor Processes and Devices 2004 ◽

10.1007/978-3-7091-0624-2_62 ◽

2004 ◽

pp. 267-270

Author(s):

C. Le Royer ◽

G. Le Carval ◽

M. Sanquer

Keyword(s):

Circuit Simulation ◽

Compact Model ◽

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SPICE-Compatible Macro Model for Split-Gate Compact NVM Cell with Various Gap Sizes

Simulation of Semiconductor Processes and Devices 2004 ◽

10.1007/978-3-7091-0624-2_61 ◽

2004 ◽

pp. 263-266 ◽

Author(s):

Nader Akil ◽

Ronald van Langevelde ◽

Pierre Goarin ◽

Michiel van Duuren ◽

Michiel Slotboom

Keyword(s):

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Very High Performance, Sub-20nm, Strained Si and Six Ge1-x, Hetero-structure, Center Channel (CC) NMOS and PMOS DGFETs

Simulation of Semiconductor Processes and Devices 2004 ◽

10.1007/978-3-7091-0624-2_43 ◽

2004 ◽

pp. 191-194 ◽

Author(s):

Tejas Krishnamohan ◽

Christoph Jungemann ◽

Krishna C. Saraswat

Keyword(s):

High Performance ◽

Strained Si ◽

Hetero Structure ◽

Center Channel ◽

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Full Band and Approximated Solutions of the Schrödinger Equation in Silicon Inversion layers

Simulation of Semiconductor Processes and Devices 2004 ◽

10.1007/978-3-7091-0624-2_4 ◽

2004 ◽

pp. 17-20

Author(s):

David Esseni ◽

Pierpaolo Palestri

Keyword(s):

Schrödinger Equation ◽

Schrodinger Equation ◽

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Full Three-Dimensional Analysis of a Non-Volatile Memory Cell

Simulation of Semiconductor Processes and Devices 2004 ◽

10.1007/978-3-7091-0624-2_31 ◽

2004 ◽

pp. 129-132 ◽

Author(s):

A. Hössinger ◽

R. Minixhofer ◽

S. Selberherr

Keyword(s):

Dimensional Analysis ◽

Three Dimensional ◽

Memory Cell ◽

Non Volatile Memory ◽

Volatile Memory

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Modeling of Stress Induced Layout Effect on Electrical Characteristics of Advanced MOSFETs

Simulation of Semiconductor Processes and Devices 2004 ◽

10.1007/978-3-7091-0624-2_15 ◽

2004 ◽

pp. 61-64 ◽

Author(s):

O. Fujii ◽

H. Yoshimura ◽

R. Hasumi ◽

T. Sanuki ◽

H. Oyamatsu ◽

...

Keyword(s):

Electrical Characteristics

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Modeling dopant diffusion in SiGe and SiGeC layers

Simulation of Semiconductor Processes and Devices 2004 ◽

10.1007/978-3-7091-0624-2_11 ◽

2004 ◽

pp. 45-48 ◽

Author(s):

A. Pakfar ◽

P. Holliger ◽

A. Poncet ◽

C. Fellous ◽

D. Dutartre ◽

...

Keyword(s):

Dopant Diffusion

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Modeling and Simulation of Combined Thermionic Emission-Tunneling Current through Interfacial Isolation Layer

Simulation of Semiconductor Processes and Devices 2004 ◽

10.1007/978-3-7091-0624-2_66 ◽

2004 ◽

pp. 283-286

Author(s):

J. Racko ◽

P. Kudela ◽

D. Donoval ◽

G. Wachutka

Keyword(s):

Modeling And Simulation ◽

Thermionic Emission ◽

Tunneling Current ◽

Isolation Layer

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A Local Mobility Model for Ultra-Thin DGSOI nMOSFETs

Simulation of Semiconductor Processes and Devices 2004 ◽

10.1007/978-3-7091-0624-2_27 ◽

2004 ◽

pp. 113-116 ◽

Author(s):

Andreas Schenk

Keyword(s):

Mobility Model ◽

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