IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings.
Latest Publications

TOTAL DOCUMENTS

112

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

0780381823

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

An advanced cell polynomial-base modeling for logic synthesis

IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings. ◽

10.1109/soc.2003.1241550 ◽

2004 ◽

Cited By ~ 2

Author(s):

Wen-Tsong Shiue ◽

W. Wanalertlak

Keyword(s):

Logic Synthesis

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Library characterization and modeling for 130 nm and 90 nm SoC design

IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings. ◽

10.1109/soc.2003.1241548 ◽

2004 ◽

Cited By ~ 11

Author(s):

W. Roethig

Keyword(s):

Library Characterization

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Design and realization of a 2.4 Gbps - 3.2 Gbps clock and data recovery circuit using deep-submicron digital CMOS technology

IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings. ◽

10.1109/soc.2003.1241471 ◽

2004 ◽

Cited By ~ 3

Author(s):

Z.O. Gursoy ◽

Y. Leblebici

Keyword(s):

Clock And Data Recovery ◽

Cmos Technology ◽

Deep Submicron ◽

Data Recovery ◽

Digital Cmos

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Efficient VLSI design of a pulse shaping filter and DAC interface for W-CDMA transmission

IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings. ◽

10.1109/soc.2003.1241546 ◽

2004 ◽

Cited By ~ 2

Author(s):

I. Berenguer ◽

M. Palazzi ◽

O. Bastidas-Garcia ◽

L. Bonizec ◽

Y. Rasse

Keyword(s):

Pulse Shaping ◽

Vlsi Design ◽

Shaping Filter

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Energy recovery design for low-power ASICs

IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings. ◽

10.1109/soc.2003.1241561 ◽

2004 ◽

Cited By ~ 2

Author(s):

C.H. Ziesler ◽

Joohee Kim ◽

M.C. Papaefthymiou ◽

Suhwan Kim

Keyword(s):

Low Power ◽

Energy Recovery ◽

Recovery Design

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Layout-aware gate-sizing and buffer insertion for low-power low-noise DSM circuits

IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings. ◽

10.1109/soc.2003.1241517 ◽

2004 ◽

Cited By ~ 1

Author(s):

A. Mukhejee ◽

R. Sankaranarayan ◽

K.R. Dusety

Keyword(s):

Low Power ◽

Low Noise ◽

Gate Sizing ◽

Buffer Insertion

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VLSI implementation of a color map inversion algorithm [color printer applications]

IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings. ◽

10.1109/soc.2003.1241522 ◽

2004 ◽

Author(s):

M.W. Martin ◽

K.W. Hsu ◽

S.A. Dianat ◽

A. Mathew

Keyword(s):

Vlsi Implementation ◽

Inversion Algorithm ◽

Color Map

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A 8192 complex point FFT/IFFT for COFDM modulation scheme in DVB-T system

IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings. ◽

10.1109/soc.2003.1241478 ◽

2004 ◽

Author(s):

Jung-Hee Suk ◽

Dae-Won Kim ◽

Taek-Won Kwon ◽

Suk-Kun Hyung ◽

Jun-rim Choi

Keyword(s):

Modulation Scheme ◽

Complex Point ◽

T System

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High-performance and low-voltage sense-amplifier techniques for sub-90nm SRAM

IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings. ◽

10.1109/soc.2003.1241474 ◽

2004 ◽

Cited By ~ 18

Author(s):

M. Sinha ◽

S. Hsu ◽

A. Alvandpour ◽

W. Burleson ◽

R. Krishnamurthy ◽

...

Keyword(s):

High Performance ◽

Low Voltage ◽

Sense Amplifier

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An autonomous multiple module clock synchronization methodology for SoC

IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings. ◽

10.1109/soc.2003.1241458 ◽

2004 ◽

Author(s):

Shi-Dai Mai ◽

Hong-Wen Lune ◽

Ren-Chien Hsu ◽

Chauchin Su

Keyword(s):

Clock Synchronization ◽

Multiple Module

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IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings.Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

An advanced cell polynomial-base modeling for logic synthesis

Library characterization and modeling for 130 nm and 90 nm SoC design

Design and realization of a 2.4 Gbps - 3.2 Gbps clock and data recovery circuit using deep-submicron digital CMOS technology

Efficient VLSI design of a pulse shaping filter and DAC interface for W-CDMA transmission

Energy recovery design for low-power ASICs

Layout-aware gate-sizing and buffer insertion for low-power low-noise DSM circuits

VLSI implementation of a color map inversion algorithm [color printer applications]

A 8192 complex point FFT/IFFT for COFDM modulation scheme in DVB-T system

High-performance and low-voltage sense-amplifier techniques for sub-90nm SRAM

An autonomous multiple module clock synchronization methodology for SoC

IEEE International [Systems-on-Chip] SOC Conference, 2003. Proceedings.
Latest Publications