A novel in-plane sensitive Hall arrangement consisting of two identical n-Si three-contact (3C) elements and realized in a common technological process, is presented. In the solution, the minimization of the offset and its temperature drift is achieved by cross-coupling of the outer device contacts. This terminals’ connection provides equalizing currents between the two substrates which strongly compensate the inevitable difference in the electrical conditions in the two parts of the arrangement. As a result, the residual offset of both integrated Hall elements at the output Vout(0) and its temperature drift are strongly minimized. The residual offset is about 160 times smaller than the single-configuration one. The obtained output voltage-to-residual offset ratio at sensitivity of SRI ≈ 98 V/AT is very promising, reaching 6 × 103 at temperature T = 40 °C and induction 1 T. As a result, increased metrological accuracy for numerous applications is achieved. For a first time through the novel arrangement a suppression of sensitivity in the presence of external magnetic field could be achieved in order to obtain permanent offset information. This is one of the key results in the Hall device investigation.
Low-Offset In-Plane Sensitive Hall Arrangement
