A secure data parallel processing based embedded system for internet of things computer vision using field programmable gate array devices

2021 ◽  
Author(s):  
Kashif Naseer Qureshi ◽  
Sundus Qayyum ◽  
Muhammad Najam Ul Islam ◽  
Gwanggil Jeon
Keyword(s):  
Computer Vision ◽  
Parallel Processing ◽  
Internet Of Things ◽  
Embedded System ◽  
Field Programmable Gate Array ◽  
Data Parallel ◽  
Secure Data ◽  
Field Programmable ◽  
Gate Array

scholarly journals A reconfigurable smart interface based on IEEE 1451 and field programmable gate array for multiple Internet of Things devices

2017 ◽  
Vol 13 (2) ◽  
pp. 155014771769384
Author(s):  
Shulong Wang ◽  
Yibin Hou ◽  
Fang Gao ◽  
Xinrong Ji
Keyword(s):  
Internet Of Things ◽  
Field Programmable Gate Array ◽  
The Internet ◽  
Sensors And Actuators ◽  
Field Programmable ◽  
Transducer Design ◽  
Ieee 1451 ◽  
Gate Array ◽  
Internet Of Things Technology ◽  
The Internet Of Things

The Internet of Things is becoming increasingly important in traffic, medical treatment, and other industry fields. With the development of the Internet of Things technology, lots of new “things” need to be accessed to the Internet of Things. Currently, Internet of Things applications adopt multiple methods to access the heterogeneous devices. How to provide unified access means for those “things” is a fundamental issue. To solve this problem, a new method is proposed in this article to design a reconfigurable smart interface for multiple Internet of Things devices. The IEEE 1451 standard is adopted for this design, and it comprehensively specifies the smart transducer design and relevant interface protocol to implement the intelligent acquisition for common sensors and actuators. Field programmable gate array is adopted for the implementation of this design to reduce consumption of resources and enable the reconfiguration of the whole system. Performance of the proposed system is evaluated, and good performance is achieved in practical application for office environment monitoring.

scholarly journals Enhancing Apple Maturation Recognition Performance Based on Field Programmable Gate Array Implementation

2019 ◽  
Vol 54 (6) ◽  
Author(s):  
Fouad H. Awad ◽  
Mohammed A. Fadhel ◽  
Khattab M. Ali Alheeti ◽  
Omran Al-Shamma ◽  
Laith Alzubaidi
Keyword(s):  
Parallel Processing ◽  
Field Programmable Gate Array ◽  
Recognition Performance ◽  
Recognition System ◽  
Clustering Technique ◽  
Field Programmable ◽  
Speed Up ◽  
Gate Array ◽  
Hardware Designs ◽  
Mature Apple

Recently, several techniques have been developed for vegetable and fruit maturing recognition. Adding hardware designs will enhance the recognition performance. Especially, parallel processing designs efficiently speed up the process functions. This paper utilizes a hardware parallel processing design called field programmable gate array for that purpose. In addition, two different methods; namely K-means clustering and color thresholding are used for recognizing the apple maturation. This study aims to design and implement a mature apple recognition system based on field programmable gate array. The results demonstrate that the color thresholding technique is faster, more reliable and more effective than the K-means clustering technique.

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