Due to the lack of GaN wafers, so far, group-III nitrides are mostly grown on sapphire or SiC substrates. Silicon offers an attractive alternative because of its low cost, large wafer area, and physical benefits such as the possibility of chemical etching, lower hardness, good thermal conductivity, and electrical conducting or isolating for light emitting devices or transistor structures, respectively. However, for a long time, a technological breakthrough of GaN-on-silicon has been thought to be impossible because of the cracking problem originating in the huge difference of the thermal expansion coefficients between GaN and silicon which leads to tensile strain and cracking of the layers when cooling down. However, in recent years, several approaches to prevent cracking and wafer bowing have been successfully applied. Nowadays, device-relevant thicknesses of crackfree group-III-nitrides can be grown on silicon. To reach this goal the most important issues were the identification of the physical origin of strains and its engineering by means of in situ monitoring during metalorganic vapor phase epitaxy.
