Low Power Memory Design

1996 ◽  
pp. 201-251 ◽  
Author(s):  
K. Itoh
Keyword(s):  
Low Power ◽  
Memory Design

Low Power Memory Design

2006 ◽  
pp. 51-89
Author(s):  
Yukihito Oowaki ◽  
Tohru Tanzawa
Keyword(s):  
Low Power ◽  
Memory Design

Low-power content addressable memory design using two-layer P-N match-line control and sensing

Integration ◽  
2020 ◽  
Vol 75 ◽  
pp. 73-84
Author(s):  
Sheikh Wasmir Hussain ◽  
Telajala Venkata Mahendra ◽  
Sandeep Mishra ◽  
Anup Dandapat
Keyword(s):  
Low Power ◽  
Content Addressable Memory ◽  
Memory Design ◽  
Power Content

An Integrated Architectural Clock Implemented Memory Design for Embedded System

2015 ◽  
Vol 4 (2) ◽  
pp. 129
Author(s):  
Ravi Khatwal ◽  
Manoj Kumar Jain
Keyword(s):  
Embedded System ◽  
Low Power ◽  
Propagation Delay ◽  
Internal Clock ◽  
Access Time ◽  
Architecture Design ◽  
Embedded Devices ◽  
Memory Design ◽  
Simulation Performance ◽  
Cache Simulation

Recently Low power custom memory design is the major issue for embedded designer. Micro wind and Xilinx simulator performs efficient cache simulation and high performances with low power consumption. SRAM efficiency analyzed with 6-T architecture design and analyzed the simulation performance for specific application. We have implemented clock based memory architecture design and analyzed internal clock efficiency for SRAM. Architectural clock implemented memory design that reduces access time and propagation delay time for embedded devices. Internal semiconductor material improvement increases simulation performance and these design implemented for application specific design architecture.

Low Power Embedded Memory Design for Viterbi Decoder with Energy Optimized Write Operation

2013 ◽  
Vol 50 (11) ◽  
pp. 117-123
Author(s):  
Hoyoung Tang ◽  
Dongyeob Shin ◽  
Donghoo Song ◽  
Jongsun Park
Keyword(s):  
Low Power ◽  
Viterbi Decoder ◽  
Embedded Memory ◽  
Memory Design

A fast low power embedded cache memory design

2002 ◽  
Author(s):  
Zhao Xue-mei ◽  
Ye Yi-zheng ◽  
Yu Ming-yan ◽  
Li Xiao-ming
Keyword(s):  
Low Power ◽  
Cache Memory ◽  
Memory Design
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