An Integrated Architectural Clock Implemented Memory Design for Embedded System

2015 ◽  
Vol 4 (2) ◽  
pp. 129
Author(s):  
Ravi Khatwal ◽  
Manoj Kumar Jain
Keyword(s):  
Embedded System ◽  
Low Power ◽  
Propagation Delay ◽  
Internal Clock ◽  
Access Time ◽  
Architecture Design ◽  
Embedded Devices ◽  
Memory Design ◽  
Simulation Performance ◽  
Cache Simulation

Recently Low power custom memory design is the major issue for embedded designer. Micro wind and Xilinx simulator performs efficient cache simulation and high performances with low power consumption. SRAM efficiency analyzed with 6-T architecture design and analyzed the simulation performance for specific application. We have implemented clock based memory architecture design and analyzed internal clock efficiency for SRAM. Architectural clock implemented memory design that reduces access time and propagation delay time for embedded devices. Internal semiconductor material improvement increases simulation performance and these design implemented for application specific design architecture.

scholarly journals The Demonstration of S2P (Serial-to-Parallel) Converter with Address Allocation Method Using 28 nm CMOS Technology

2021 ◽  
Vol 11 (1) ◽  
pp. 429
Author(s):  
Min-Su Kim ◽  
Youngoo Yang ◽  
Hyungmo Koo ◽  
Hansik Oh
Keyword(s):  
Integrated Circuits ◽  
Embedded System ◽  
Low Power ◽  
High Speed ◽  
Cmos Technology ◽  
Clock Frequency ◽  
Clock Generation ◽  
Allocation Method ◽  
Evaluation Board ◽  
28 Nm

To improve the performance of analog, RF, and digital integrated circuits, the cutting-edge advanced CMOS technology has been widely utilized. We successfully designed and implemented a high-speed and low-power serial-to-parallel (S2P) converter for 5G applications based on the 28 nm CMOS technology. It can update data easily and quickly using the proposed address allocation method. To verify the performances, an embedded system (NI-FPGA) for fast clock generation on the evaluation board level was also used. The proposed S2P converter circuit shows extremely low power consumption of 28.1 uW at 0.91 V with a core die area of 60 × 60 μm2 and operates successfully over a wide clock frequency range from 5 M to 40 MHz.

The Development of Embedded System for Energy Saving in Electro-Hydraulic System

2013 ◽  
Vol 418 ◽  
pp. 63-69
Author(s):  
Sema Patchim ◽  
Watcharin Po-Ngaen
Keyword(s):  
Embedded System ◽  
Low Power ◽  
Hydraulic System ◽  
Fuzzy Controller ◽  
Low Cost ◽  
Operational Performance ◽  
Functional Design ◽  
Power Utility ◽  
Load Sensing ◽  
Oil Flow

In last decade, energy efficiency of hydraulic actuators systems has been especially important in industrial machinery applications [1-. And an advanced electronics world most of the applications are developed by microcontroller based embedded system. Energy processor based variable oil flow of hydraulic controller was presented to improve the efficiency of the motor by maintaining with the load sensing. These PIC processor combined with fuzzy controller were help to design efficient optimal power hydraulic machine controller. A functional design of processor and in this system was completed by using load sensing signal to control oil flow. The advantage of the proposed system was optimized operational performance and low power utility. Without having the architectural concept of any motor we can control it by using this method. This is a low cost low power controller and easy to use. The experiment results verified its validity.

Architecture Design of Urban Intelligent Transportation Using Cloud Computing

2012 ◽  
Vol 605-607 ◽  
pp. 2549-2552 ◽  
Author(s):  
Ji Zhe Wang ◽  
Zhan Jie Wang
Keyword(s):  
Cloud Computing ◽  
Embedded System ◽  
Intelligent Control ◽  
Public Transportation ◽  
Intelligent Transportation ◽  
Architecture Design ◽  
Information Platform ◽  
Intelligent City ◽  
Public Transportation System ◽  
The Embedded System

This article does a further research on the technologies of cloud computing and intelligent public transportation, designs a human-centered intelligent public transportation system, improves the connection between passengers and vehicles, vehicles and vehicles. Technologies of BeiDou messaging, capacity sensor, RFID and Web are used to improve the intelligence of public transportation information platform. This article makes an architecture design in intelligent transportation based on cloud computing and uses the embedded system as the core. The architecture allows passengers to obtain needed vehicles’ information through various services whenever and wherever, and strongly supports intelligent control and schedule of multi-vehicles and multi-lines. The system lays a good foundation for the intelligent city.

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